LDO Voltage Regulator Combined Compensation Scheme
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Solution Overview
Problem
Typical low drop-out (LDO) voltage regulator circuits exhibit slower transient performance and unstable output due to the use of Miller compensation schemes, leading to undesirable ringing and potential load malfunctions.
Innovation Solution
The implementation of a combined compensation scheme using a cascode current mirror compensation scheme and a split length differential input pair compensation scheme, which enhances frequency stability and transient response by adjusting capacitance values and effective gain settings to cancel out non-dominant poles and achieve pole-zero cancellation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a Miller compensation circuit is used in the LDO voltage regulator, then the circuit provides current compensation and feedback control, but the transient performance becomes slower and the output becomes unstable with excessive ringing
Solution Approach 1:
The compensation function is divided into two separate compensation circuits: a first compensation circuit connected to the output of the input differential transistor pair, and a second compensation circuit connected to the input of the first transistor pair of the localized common-mode feedback circuit. This segmentation allows each circuit to independently optimize different aspects of the frequency response without the trade-offs inherent in a single Miller compensation circuit.
Solution Approach 2:
The patent introduces compensation capacitors as intermediary elements that mediate the frequency response characteristics. The first compensation capacitor is placed between the output of the input differential transistor pair and ground, while the second compensation capacitor is placed between the input of the first transistor pair and ground. These intermediary capacitors provide phase compensation without the excessive pole-zero cancellation effects that cause ringing in traditional Miller compensation.
2Reliability
If traditional Miller compensation is used, then feedback control is provided, but non-dominant poles cannot be effectively canceled leading to poor phase margin and frequency stability
Solution Approach 1:
The frequency compensation function is segmented into two independent compensation circuits, each with its own capacitor. The first compensation circuit addresses the dominant pole and provides primary stability, while the second compensation circuit addresses non-dominant poles and fine-tunes the phase margin. This segmentation achieves superior frequency stability without requiring a single complex compensation network.
Solution Approach 2:
The patent changes the placement and values of compensation capacitors to optimize frequency response. By placing capacitors at specific nodes (output of input differential pair and input of first transistor pair) and selecting appropriate capacitance values, the circuit achieves effective pole-zero cancellation and improved phase margin without increasing overall circuit complexity.
Data Source
AI summary
The disclosure provides an LDO voltage regulator circuit and a related method. The circuit includes an error amplifier having a localized common-mode feedback circuit, receiving a reference voltage, a feedback voltage, and an input voltage, and generating an amplified error voltage; a pass element having a power transistor, receiving the amplified error voltage, and generating an output voltage; a feedback circuit receiving the output voltage and having a voltage divider which scales down the output voltage; a first compensation element having a first terminal which connects to an output of the input differential transistor pair and a second terminal which receives the output voltage; and a second compensation element having a third terminal which receives the output voltage and connects to the second terminal and a fourth terminal which connects to an input of a first transistor pair of the localized common-mode feedback circuit.