LDO Regulator Droop Compensation During Load Current Transitions
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Integrated circuits face supply voltage droop issues due to varying current demands from signal processing cores, which can lead to malfunction or damage if not managed effectively.
Innovation Solution
A low-dropout (LDO) voltage regulator with a voltage droop compensation circuit, utilizing a set of field effect transistors and a gate voltage control circuit to manage voltage across the load during mode transitions, includes a voltage droop detector and a voltage control circuit to regulate output voltage within a target range.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the PMIC or power supply circuit supplies current during sudden load current increases, then the current demand is met, but supply voltage droop occurs which can cause malfunction or damage
Solution Approach 1:
The voltage droop compensation circuit performs preliminary action by detecting voltage droop conditions and proactively adjusting the gate voltages of the FETs before the voltage droop can cause malfunction or damage. The circuit monitors the supply voltage and preemptively increases the drive strength of the FETs to meet sudden current demands, preventing the harmful voltage droop from occurring in the first place.
2Productivity
If multiple sets of FETs are used to handle different current demands, then the current supply capability is improved, but the device complexity increases
Solution Approach 1:
The patent merges multiple sets of FETs (first set and second set) into a unified power supply structure that can operate in different modes. The gate voltage control circuit combines the control of both FET sets, and the voltage droop compensation circuit integrates the monitoring and adjustment functions for the entire system, reducing overall complexity while maintaining the ability to handle varying current demands efficiently.
Data Source
AI summary
The disclosure relates to an apparatus including: a first set of one or more field effect transistors (FETs) coupled between a first voltage rail and a load; a second set of one or more FETs coupled between the first voltage rail and the load; a gate voltage control circuit configured to: provide a first set of gate voltages to first and second gates of the first and second sets of one or more FETs in accordance with a first mode of operation, respectively; and provide a second set of gate voltages to the first and second gates of the first and second sets of one or more FETs in accordance with a second mode of operation, respectively; and a voltage droop compensation circuit configured to control an output voltage across the load during a transition from the first mode of operation to the second mode of operation.