LDO Regulator Droop Adjustment for Load-Current Voltage Stability

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Solution Overview

Problem

Existing low drop-out (LDO) regulators in mobile devices face challenges in maintaining a stable operating voltage when load current increases, leading to voltage drops that can affect the performance and stability of electronic circuits.

Innovation Solution

The proposed solution involves an LDO regulator design that includes a power transistor, an error amplifier, and a droop adjusting circuit, which adjusts the gate voltage based on changes in load current to maintain a stable output voltage. This design also incorporates an adaptive bias circuit and a resistive common mode feedback circuit to enhance impedance and stability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If the load current increases, then the power handling capability is improved, but the output voltage stability deteriorates

Engineering Contradiction:
Improvepower handling capabilityVSAvoidoutput voltage stability
Core Design Contradiction:
PowerVSReliability

Solution Approach 1:

The patent implements a feedback mechanism where the output voltage is continuously monitored and fed back to the error amplifier. The error amplifier compares the feedback voltage with a reference voltage and adjusts the gate voltage of the power transistor accordingly to maintain stable output voltage even when load current changes. This closed-loop feedback control resolves the contradiction by automatically compensating for voltage drops under varying load conditions.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The LDO regulator employs self-service through the error amplifier that automatically detects voltage deviations and adjusts the power transistor gate voltage without external intervention. The circuit monitors its own output and performs self-correction by modulating the power transistor conduction based on the detected voltage error, enabling the system to maintain stability under varying power conditions autonomously.

Inventive Principle:
Principle #25Self-service

2Reliability

If the gate voltage is increased to maintain output voltage under high load, then the output voltage stability is improved, but the power consumption increases

Engineering Contradiction:
Improveoutput voltage stabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent applies dynamics by making the gate voltage adjustable rather than fixed. The error amplifier dynamically modulates the gate voltage based on real-time output voltage conditions and load requirements. This dynamic adjustment allows the system to use only the necessary gate voltage to maintain stability, avoiding excessive power consumption while ensuring voltage stability under varying load conditions.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The circuit changes the gate voltage parameter dynamically based on operating conditions. The error amplifier adjusts the gate voltage level according to the detected voltage error and load current, optimizing the balance between maintaining output voltage stability and minimizing power consumption. This parameter adaptation resolves the contradiction by using the minimum necessary gate voltage for stable operation.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11789479B2Low drop-out regulator and mobile device
Publication Date: 2023.10.17 SAMSUNG ELECTRONICS CO LTD
  • US11789479B2 patent drawing
  • US11789479B2 patent drawing
  • US11789479B2 patent drawing

AI summary

A low drop-out (LDO) regulator includes a power transistor, an error amplifier and a droop adjusting circuit. The power transistor regulates a driving voltage based on a gate voltage of a gate node to provide an output voltage at an output node. The error amplifier outputs the gate voltage by amplifying a voltage difference between a reference voltage and a feedback voltage proportional to the output voltage. The droop adjusting circuit is connected between the gate node and the output node, is coupled to the output voltage, and adjusts the gate voltage to compensate for a change of the output voltage based on a change of a load current which is provided to a load from the output node.