LDO Dropout Control Using VMIN to Limit Quiescent Current

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Solution Overview

Problem

Low dropout regulators (LDOs) experience significant increases in quiescent current during dropout operation, leading to inefficiency and reduced lifespan of depletable voltage supplies, particularly when used with batteries, as they attempt to regulate output voltage without sufficient input voltage, resulting in substantial current consumption even at light or no load conditions.

Innovation Solution

The implementation of a minimum dropout voltage (VMIN) circuit that maintains the reference voltage below the input voltage by generating a VMIN value, preventing the LDO from entering dropout and thus limiting quiescent current, by configuring the VMIN circuit to adjust VREF based on VIN, ensuring the LDO can regulate without excessive current draw.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the LDO attempts to regulate output voltage when input voltage is insufficient (dropout operation), then the output voltage regulation is maintained, but the quiescent current increases substantially (tens to thousands of times more)

Engineering Contradiction:
Improveoutput voltage regulationVSAvoidquiescent current
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The circuit applies preliminary anti-action by detecting the dropout condition through the amplifier comparing VIN and VREF, and preemptively adjusting the pass transistor to limit current flow before the excessive current consumption occurs. The voltage divider and amplifier configuration creates a feedback mechanism that prevents the LDO from entering the high-current dropout state.

Inventive Principle:
Principle #9Preliminary anti-action

2Reliability

If the LDO operates in dropout mode to maintain output voltage, then voltage regulation is preserved, but the lifespan of depletable voltage supplies is reduced

Engineering Contradiction:
Improvevoltage regulationVSAvoidlifespan of voltage supply
Core Design Contradiction:
ReliabilityVSDuration of action of moving object

Solution Approach 1:

The circuit implements feedback by using the amplifier to continuously monitor the relationship between VIN and VREF through the voltage divider network. When dropout conditions are detected (VIN < VREF), the amplifier output adjusts the pass transistor gate voltage, creating a closed-loop control system that prevents excessive current draw and extends battery lifespan.

Inventive Principle:
Principle #23Feedback

3Reliability

If the LDO enters dropout operation, then it continues to attempt regulation, but current consumption increases by tens to hundreds of times

Engineering Contradiction:
Improveregulation attemptVSAvoidcurrent consumption
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The circuit applies dynamics by making the pass transistor's resistance variable rather than fixed. The amplifier dynamically adjusts the transistor's gate voltage based on the real-time comparison between VIN and VREF, allowing the circuit to adapt its current consumption characteristics according to the input voltage conditions, thereby preventing the static high-current dropout state.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS11422579B2Low dropout control for light load quiescent current reduction
Publication Date: 2022.08.23 TEXAS INSTRUMENTS INC
  • US11422579B2 patent drawing
  • US11422579B2 patent drawing
  • US11422579B2 patent drawing

AI summary

Aspects of the disclosure provide for a circuit. In at least some examples, the circuit comprises a first amplifier, a voltage divider, a first resistor, and a transistor. The first amplifier comprises a first input terminal configured to receive a first voltage signal, a second input terminal coupled to a first node, and an output terminal. The voltage divider is coupled between a second node and a ground node and having the first node as an output node of the voltage divider. The first resistor is coupled at a first end to the second node. The transistor comprises a gate terminal coupled to the output terminal of the first amplifier, the transistor being coupled between an input voltage node and a second end of the first resistor.