LDO Voltage Regulator Dual Feedback Loop Biasing
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Solution Overview
Problem
Existing linear voltage regulators face issues with low gain, large d.c. offset, and low power supply rejection ratio (PSRR) due to limitations in CMOS technology, leading to poor noise resilience and current load regulation.
Innovation Solution
A low dropout (LDO) device with a dual feedback loop configuration, featuring a first error amplifier, a pass transistor, a second error amplifier, and a current source, where the second error amplifier controls the bias current of the first error amplifier, enhancing noise resilience and PSRR without requiring large internal or external capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a single stage operational transconductance amplifier (OTA) is used, then the design is more robust to noise, but the gain is low and power supply rejection ratio (PSRR) is poor
Solution Approach 1:
The patent divides the error amplifier into two separate stages: a first error amplifier that provides high gain and power supply rejection, and a second error amplifier that compensates for ground noise. This segmentation allows each stage to optimize for its specific function, resolving the contradiction between noise robustness and PSRR performance.
Solution Approach 2:
The second error amplifier acts as an intermediary that processes the feedback signal to compensate for ground noise before it affects the regulation. This intermediary stage allows the first error amplifier to maintain high PSRR while the overall system achieves noise robustness through the combined action of both amplifiers.
2Ease of manufacture
If CMOS technology is used, then the device is manufacturable with standard processes, but transconductance is low leading to low PSRR
Solution Approach 1:
By segmenting the error amplifier into two stages, the patent enables the first stage to be optimized for high PSRR using CMOS technology, while the second stage handles noise compensation. This allows standard CMOS manufacturing to be used while achieving high PSRR performance that would be difficult with a single stage.
Solution Approach 2:
The patent changes the operational parameters of the CMOS amplifiers by using different configurations for the two error amplifier stages. The first stage uses parameters optimized for high gain and PSRR, while the second stage uses parameters optimized for noise compensation, allowing CMOS technology to achieve high PSRR performance.
3Adaptability or versatility
If the current load departs from typical current load, then the output current must be adjusted, but large voltage offset is required due to small gain
Solution Approach 1:
The two-stage error amplifier structure segments the voltage offset compensation function from the main regulation function. The first error amplifier maintains small voltage offset for precise regulation, while the second error amplifier provides the additional voltage offset needed for current load adjustments, allowing the system to handle varying current loads with minimal offset.
Solution Approach 2:
The patent uses feedback from the output to both error amplifiers, allowing the system to dynamically adjust the combined output of both stages. This feedback mechanism ensures that when current load changes, the system can generate the necessary voltage offset while maintaining precise voltage regulation through the high gain of the first error amplifier.
Data Source
Figure 1A~1B
Figure 2
Figure 3~4
AI summary
An apparatus and method for a linear voltage regulator with improved voltage regulation is disclosed. A linear voltage regulator device with improved voltage regulation that combines good resiliency to noisy ground reference, high Power Supply Rejection Ratio (PSRR), good current load regulation with changes in the current load and good feedback loop stability. The linear voltage regulator comprises of an amplifier, a current source, a pass gate, a current load, a first feedback loop, a second feedback loop, a second amplifier and second pass gate. A second feedback loop is formed to control the bias of the first feedback loop.