Multi-Stage LDO Regulator Fast Power-Up with Gm Capacitor Charging
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Solution Overview
Problem
Multi-stage low drop-out (LDO) regulators experience slow power up and power down times due to the presence of large decoupling capacitors, which are necessary for high Power Supply Rejection Ratio (PSRR) but hinder fast charging and discharging capabilities, making them unsuitable for noise-sensitive circuitry that requires rapid power transitions.
Innovation Solution
Incorporating transconductance amplifiers (Gm amplifiers) to dynamically charge and discharge capacitors during power up and power down periods, ensuring desired charge levels are achieved within specified times independently of capacitor values and output impedance, thereby enhancing the speed of power transitions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If large decoupling capacitors are used in multi-stage LDO regulators to achieve high Power Supply Rejection Ratio (PSRR), then noise filtering capability is improved, but power up and power down times become slow
Solution Approach 1:
The patent applies preliminary action by pre-charging decoupling capacitors before the LDO regulator stages are activated. The system performs a charging phase where capacitors are charged to appropriate voltage levels before the regulator begins normal operation, ensuring immediate stable output without slow ramp-up. This preliminary charging action resolves the contradiction by preparing the capacitors in advance so they don't slow down the power-up time when actually needed.
Solution Approach 2:
The patent implements periodic action by using separate charging and discharging phases for the decoupling capacitors. During power-up, capacitors are charged through dedicated charging circuits; during power-down, they are discharged through separate discharge paths. This periodic charging/discharging mechanism allows the system to maintain high PSRR while achieving fast power transitions, as the capacitors are actively managed in distinct phases rather than passively responding to regulator changes.
2Stability of the object's composition
If large decoupling capacitors are used to ensure stable power supply, then Power Supply Rejection Ratio is improved, but the ability to quickly respond to power demands is reduced
Solution Approach 1:
The patent pre-charges decoupling capacitors to their required voltage levels before the LDO regulator stages are activated. This preliminary charging ensures that when power is demanded, the capacitors are already charged and ready to immediately supply current, eliminating the delay that would normally occur while capacitors charge up. The system thus achieves both stability (through properly charged capacitors) and speed (through pre-prepared charge state).
Solution Approach 2:
The patent introduces intermediary charging circuits and control logic that mediate between the power source and the decoupling capacitors. These intermediary elements actively manage the charging and discharging of capacitors, allowing the system to maintain stable voltage across capacitors while enabling rapid response to power demands. The intermediary control ensures capacitors are charged/discharged optimally without compromising either stability or speed.
3Reliability
If multi-stage LDO configuration is used to achieve high PSRR, then noise filtering is improved, but circuit complexity increases
Solution Approach 1:
The patent merges the functions of multiple LDO stages into a coordinated system with unified control. Rather than having independent multi-stage regulators each requiring separate decoupling and control circuits, the invention combines them under a single control architecture that manages all stages and their capacitors centrally. This merging reduces overall circuit complexity while maintaining the high PSRR benefits of multi-stage configuration.
Solution Approach 2:
The patent implements universal control circuits that perform multiple functions across different LDO stages. The charging and discharging control logic serves all decoupling capacitors in the multi-stage configuration, and the control mechanism handles both power-up sequencing and dynamic load response. This multi-functionality reduces the need for stage-specific complex circuitry, simplifying the overall device while achieving high PSRR.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The use of Gm amplifiers allows for fast power up and power down times in multi-stage LDO regulators, meeting the needs of downstream circuitry by actively managing current flow to capacitors, thus improving the regulator's ability to quickly provide and remove power as required.
Implementation Method 1
an input transconductance amplifier configured to charge and/or discharge the input capacitor to achieve a desired charge level within a specified time independently of the value of the input capacitor
Data Source
AI summary
Circuits and methods that provide for fast power up and power down times in a multi-stage LDO regulator. In one embodiment, a multi-stage LDO regulator circuit includes, for each stage for which fast power up and/or power down times are desired, at least one transconductance amplifier coupled and configured to compare a primary reference voltage to one of a secondary reference voltage for the stage or an output voltage of the stage, and coupling and configuring the at least one transconductance amplifier to charge and/or discharge an associated capacitor to achieve a desired charge level within a specified time independently of the value of the associated capacitor. In general, the transconductance amplifiers of each stage are configured to charge and/or discharge an associated capacitor in synchronism with a voltage present on the primary reference voltage input.