LDO Regulator Loop Clamping for Glitch-Free CC-CV Switching
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Solution Overview
Problem
Conventional LDO voltage regulator circuits experience undesirable current and voltage glitches during mode transitions, particularly when switching from constant current to constant voltage modes, which can be damaging for highly capacitive loads like rechargeable batteries.
Innovation Solution
The LDO voltage regulator circuit incorporates a bipolar transistor in the current regulation loop with a high base impedance and high current gain, along with a differential voltage amplifier that reduces output impedance, enabling smooth mode transitions by effectively clamping the gate voltage and ensuring stable regulation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a conventional LDO voltage regulator circuit uses digital mode switching between constant voltage and constant current regulation, then the circuit can support multiple operating modes, but current and voltage glitches occur during mode transitions that can damage capacitive loads
Solution Approach 1:
The patent introduces an analog switch as an intermediary component between the control voltage and the power transistor gate. This analog switch, controlled by the mode selection signal, smoothly transitions between connecting to the voltage regulation loop output or the current regulation loop output, preventing direct abrupt switching that causes glitches. The analog switch acts as a mediator that eliminates the harmful transition effects while maintaining multi-mode operation capability.
2Speed
If the LDO circuit quickly responds to mode transition requirements, then the switching speed is improved, but the magnitude of current glitches increases before transient protection can react
Solution Approach 1:
The patent implements beforehand cushioning by using the analog switch to pre-prevent glitch formation during mode transitions. Instead of allowing abrupt changes to occur and then relying on transient protection to react, the analog switch proactively smooths the transition by continuously blending between the two regulation loop outputs based on the mode selection signal. This eliminates the need for post-glitch protection and allows fast mode switching without generating harmful current magnitudes.
3Adaptability or versatility
If the LDO circuit is designed for highly capacitive loads, then the load compatibility is improved, but the transient protection response time becomes insufficient to prevent damage from current glitches
Solution Approach 1:
The patent applies preliminary action by preventing glitch formation before it can occur during mode transitions. The analog switch continuously blends between the voltage and current regulation loop outputs based on the mode selection signal, ensuring that no abrupt changes occur that would require transient protection to react. This preliminary prevention mechanism works effectively for highly capacitive loads without being limited by protection response time, as the harmful current excursions are never generated in the first place.
Data Source
AI summary
A low drop-out (LDO) voltage regulator circuit includes a power transistor having a control terminal configured to receive a control signal and an output terminal coupled to an output node. A current regulation loop senses current flowing through the power transistor and modulates the control signal to cause the power transistor to output a constant current to the output node. A voltage regulation loop senses voltage at the output node and modulates the control signal to cause the power transistor to deliver current to the output node so that an output voltage at the output node is regulated. The current regulation loop includes a bipolar transistor connected to the control terminal of the power transistor, where a base terminal of the bipolar transistor is driven by a signal dependent on a difference between the sensed current flowing through the power transistor and a reference.