LDO NMOS Output Transient Response via Voltage Controlled Current Source
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Solution Overview
Problem
Low dropout voltage regulators with NMOS output transistors face challenges in maximizing load transient response times due to the long time it takes for the internal compensation capacitor to charge and discharge, leading to undesirable behavior during voltage glitches and load applications.
Innovation Solution
A voltage controlled current source circuit is used to clamp the internal compensation node of the LDO regulator, sensing voltage drops and mirroring current to maintain node voltage, employing a PMOS transistor to prevent the output transistor from turning off and ensuring quick recovery.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If the internal compensation capacitor is made large to ensure stability, then the circuit stability is improved, but the load transient response time deteriorates
Solution Approach 1:
The patent applies preliminary action by detecting the voltage drop at the internal compensation node before the output transistor fully turns off, and activating the voltage controlled current source in advance to clamp the node voltage. This prevents the problematic discharge sequence from occurring in the first place, maintaining both stability and fast transient response.
Solution Approach 2:
The patent introduces a voltage controlled current source as an intermediary element between the internal compensation node and ground. This mediator actively clamps the node voltage by controlling the discharge current through the compensation capacitor, allowing the large capacitor to maintain stability while preventing excessive voltage drops during transients.
2Device complexity
If the current source is made low to maintain circuit simplicity, then the device complexity is reduced, but the internal compensation node discharge speed deteriorates
Solution Approach 1:
The patent applies dynamics by making the current source adaptive rather than fixed. The voltage controlled current source automatically adjusts its discharge current based on the real-time voltage at the internal compensation node, providing high discharge speed when needed (during transients) and low current during normal operation, thus resolving the contradiction between speed and energy efficiency.
Solution Approach 2:
The patent changes the operating parameter of the current source from a fixed low value to a dynamically controlled value. By varying the current magnitude based on the compensation node voltage, the system achieves fast discharge capability when required while maintaining simplicity and energy efficiency during normal operation.
3Loss of time
If a large PMOS transistor is used to quickly charge the internal compensation capacitor, then the load transient response time is improved, but the device area increases
Solution Approach 1:
The patent uses the voltage controlled current source as an intermediary that amplifies the effective charging current without requiring a physically large transistor. The controlled current source can deliver high current pulses during transients while using a small PMOS device, thus achieving fast response without large area.
Solution Approach 2:
The patent changes the current delivery mechanism from being limited by transistor size to being controlled by a voltage-controlled current source. This allows the same small PMOS transistor to provide large effective current during transients through active control, eliminating the need for large device area.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enhances load transient response times by maintaining the internal node voltage, allowing the regulator to return to regulation quickly and minimizing the need for large PMOS transistors, thus improving the circuit's stability and responsiveness.
Implementation Method 1
The circuit senses a voltage drop of the internal node and mirrors its current to the internal node to hold the internal node voltage
Implementation Method 2
The circuit senses a voltage drop of the internal node and mirrors its current to the internal node
Implementation Method 3
A voltage controlled current source circuit is used to clamp the internal compensation node of a low dropout (LDO) regulator with an NMOS output during load transients
Data Source
AI summary
A voltage controlled current source circuit is utilized to clamp the internal compensation node of a low dropout (LDO) regulator with an NMOS output during load transients. The circuit senses a voltage drop of the internal node and mirrors its current to the internal node to hold the internal node voltage when the voltage starts to drop low enough to turn off the output transistor.