LDO Pole Tracking Compensation Using Switched-Capacitor Resistance
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Solution Overview
Problem
Low quiescent current LDOs face stability challenges due to close proximity of poles at low load currents, leading to reduced phase margin and instability, especially when adaptive biasing increases the frequency of poles as load current increases.
Innovation Solution
Incorporating a frequency-dependent resistance device, such as a switched-capacitor network, that adjusts resistance based on load current to introduce a zero into the LDO closed-loop, tracking the output pole and providing stability across varying load conditions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If adaptive biasing is used to increase error amplifier bandwidth, then transient response improves, but phase margin decreases and stability is compromised
Solution Approach 1:
The patent implements dynamic biasing where the error amplifier's bias current is adjusted based on load conditions. During transient events, increased bias current provides fast response, while during steady-state operation, reduced bias current maintains adequate phase margin. This dynamic adjustment resolves the contradiction between speed and reliability.
Solution Approach 2:
The patent changes the bias current parameter of the error amplifier based on operating conditions. By varying this parameter dynamically, the system achieves high bandwidth when needed for transient response while maintaining sufficient phase margin during normal operation, thus resolving the contradiction between transient performance and stability.
2Use of energy by moving object
If low quiescent current is implemented, then power consumption reduces, but phase margin decreases due to close proximity of poles
Solution Approach 1:
The patent uses dynamic biasing to adjust the error amplifier's operating point based on load conditions. This allows the system to maintain low quiescent current during steady-state operation while providing sufficient gain and phase margin when needed, resolving the contradiction between power consumption and stability.
3Productivity
If output pole frequency increases with load current, then regulation performance improves, but stability becomes difficult to maintain across varying load conditions
Solution Approach 1:
The patent implements feedback mechanisms that monitor load conditions and adjust the error amplifier's bias accordingly. This feedback control ensures that the system maintains adequate phase margin across varying load conditions while optimizing regulation performance at each operating point, resolving the contradiction between productivity and adaptability.
Data Source
AI summary
A system includes a low dropout regulator (LDO) circuit. The LDO circuit includes an error amplifier with an input node, a reference node, and an output node. The LDO circuit also includes a pass transistor with a control terminal, a first current terminal, and a second current terminal. The control terminal is coupled to the output node of the error amplifier, the first current terminal is coupled to a voltage source node, and the second current terminal is coupled to an LDO output node. The LDO output node is coupled to the input node of the error amplifier. The LDO circuit also includes a switched-capacitor network coupled between error amplifier and the pass transistor. The switched-capacitor network comprises a pair of switches and a current-controlled oscillator coupled to control terminals of the switches.