Linear Regulator PSRR Boost Loop for Mid-Frequency Noise Suppression
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Solution Overview
Problem
Existing linear regulators, particularly Low Drop-Out (LDO) regulators, struggle with improving the Power Supply Rejection Ratio (PSRR) across a wide frequency band, especially in the mid-frequency range, due to inefficient interactions in dual loop systems and limitations in error amplifier gain and bandwidth.
Innovation Solution
A PSRR boost loop is introduced, utilizing a NMOS pass device and a secondary loop with high-pass filters, Operational Transconductance Amplifier (OTA), and GM-GM inverter stages to enhance PSRR by inverting and amplifying noise ripple, thereby improving PSRR in mid-frequency ranges without destabilizing the main loop.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If dual loop flipped voltage follower topology is used to improve PSRR, then Power Supply Rejection Ratio is enhanced, but loop interaction efficiency deteriorates and stability is compromised especially in mid-frequency ranges
Solution Approach 1:
The patent divides the PSRR enhancement function into two independent loops: a main regulation loop and a dedicated PSRR boost loop. The PSRR boost loop is further segmented into frequency-specific stages (low-frequency, mid-frequency, and high-frequency paths) that operate independently to suppress noise at different frequency ranges without interfering with each other, resolving the loop interaction efficiency problem while maintaining improved PSRR.
2Reliability
If error amplifier gain and bandwidth are increased to achieve effective PSRR across large frequency band, then Power Supply Rejection Ratio is improved, but circuit complexity and stability margins deteriorate
Solution Approach 1:
The patent implements different gain and bandwidth characteristics in different parts of the PSRR boost loop to match the specific frequency ranges they target. The low-frequency path uses higher gain with lower bandwidth, while the high-frequency path uses lower gain with higher bandwidth. This localized optimization allows effective PSRR across the full frequency band without requiring a single error amplifier to have excessively high gain and bandwidth across all frequencies, thereby maintaining stability margins.
3Object-affected harmful factors
If mid-frequency noise suppression is enhanced, then overall noise performance is improved, but risk of destabilizing main loop increases
Solution Approach 1:
The patent introduces a dedicated PSRR boost loop as an intermediary system that handles mid-frequency noise suppression separately from the main regulation loop. This intermediary loop uses carefully compensated feedback paths and frequency-selective filtering to suppress mid-frequency noise while maintaining proper phase margins and stability. The independence of this intermediary system prevents destabilization of the main loop while achieving the desired noise suppression.
Data Source
AI summary
Approaches disclosed herein provide for increasing the Power Supply Rejection Ratio (PSRR) of a linear regulator to reduce noise in voltage from a power source. In at least one embodiment, at least a portion of a voltage to be output provided from the linear regulator is identified to include noise and is received to a correction circuit. The correction circuit processes the received noise to reverse the polarity and add gain. The processed noise is provided back to at least a portion of the voltage and can be used to suppress the noise of the voltage as the PSRR of the linear regulator increases.