LDO Capacitor Compensation for PSRR and Pole Separation

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional low dropout regulators face challenges in improving their power supply rejection ratio (PSRR) without increasing area or power consumption, as methods to enhance PSRR often result in larger size or higher power consumption.

Innovation Solution

The proposed low dropout regulator incorporates an amplifier, a buffer circuit, an output circuit, a first compensation capacitor, and a second compensation capacitor. The first capacitor separates the first pole frequency from the PSRR corner frequency, while the second capacitor separates the second and third pole frequencies, allowing the regulator to operate stably without significant area or power increases.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the number of compensation capacitors is increased to improve PSRR, then the power supply rejection ratio is improved, but the area occupied by the low dropout regulator increases significantly

Engineering Contradiction:
Improvepower supply rejection ratioVSAvoidarea occupied by the low dropout regulator
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent divides the compensation function into two separate capacitors with distinct roles: the first compensation capacitor is connected to separate the first pole frequency from the PSRR corner frequency, while the second compensation capacitor is connected to separate the second pole frequency from the third pole frequency. This segmentation allows each capacitor to be optimized for its specific frequency separation task, achieving improved PSRR with minimal total capacitance and area occupation.

Inventive Principle:
Principle #1Segmentation

2Reliability

If additional circuits are used to perform compensation and improve PSRR, then the power supply rejection ratio is improved, but the power consumption of the system increases and may cause latch-up

Engineering Contradiction:
Improvepower supply rejection ratioVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent extracts the compensation function from complex additional circuits and implements it through simple passive RC networks consisting of resistors and capacitors connected to existing nodes in the regulator. This extraction eliminates the need for power-consuming active compensation circuits while maintaining the PSRR improvement benefit, thereby reducing power consumption and avoiding latch-up conditions.

Inventive Principle:
Principle #2Taking out (Extraction)

3Reliability

If additional circuits are used to perform compensation and improve PSRR, then the power supply rejection ratio is improved, but the device complexity increases

Engineering Contradiction:
Improvepower supply rejection ratioVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the compensation function with the existing output circuitry by connecting the compensation capacitors to nodes that already exist in the regulator architecture. The first compensation capacitor connects to the output node, and the second compensation capacitor connects to the buffer output node, integrating compensation into the existing signal path without adding separate compensation circuits or increasing device complexity.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS20250117033A1Low dropout regulator and capacitor compensation method
Publication Date: 2025.04.10 REALTEK SEMICON CORP
  • US20250117033A1 patent drawing
  • US20250117033A1 patent drawing
  • US20250117033A1 patent drawing

AI summary

A low dropout regulator (LDO) comprising an amplifier, a buffer circuit, an output circuit, a first compensation capacitor and a second compensation capacitor is provided. The buffer circuit comprises an input terminal coupled to an output terminal of the amplifier. The output circuit comprises an input terminal coupled to an output terminal of the buffer circuit, and comprises an output terminal for outputting a voltage. The first compensation capacitor is coupled between the output terminal of the output circuit and an internal cascade node of the amplifier, and configured to separate a first pole frequency of a Bode plot of the LDO from a power supply rejection ratio corner frequency. The second compensation capacitor is coupled between the input terminal of the buffer circuit and an input power source, and configured to separate a second pole frequency and a third pole frequency of the Bode plot of the LDO.