LDO Quiescent Current Control via Dropout Tracking

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Solution Overview

Problem

Low-dropout regulators (LDOs) experience increased quiescent current in the dropout region, leading to reduced power efficiency, as this current becomes independent of the load current and varies with input voltage, disrupting power efficiency across the entire operation range.

Innovation Solution

A circuit and method incorporating a pass device, error amplifier stage, buffer stage with a variable resistance element, and a tracking circuit to maintain a constant quiescent current proportional to the load current, using additional transistors to control the current flow through the buffer stage, ensuring efficient power management.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the LDO operates in dropout region with input voltage close to output voltage, then the voltage regulation function is maintained, but the quiescent current increases significantly and becomes independent of load current

Engineering Contradiction:
Improvevoltage regulation functionVSAvoidquiescent current
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent applies dynamics by making the buffer stage current dynamically adjustable based on operating conditions. A control circuit monitors the voltage difference between input and output (dropout voltage) and adjusts the buffer current accordingly - reducing it when dropout voltage is small to minimize power consumption, while maintaining sufficient current when dropout voltage is large to ensure proper voltage regulation. This dynamic adaptation resolves the contradiction between maintaining regulation function and minimizing quiescent current.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the parameter of buffer stage current based on the dropout region operation. When the LDO enters dropout region (Vin close to Vout), the control circuit detects this condition and reduces the buffer current to a lower level, thereby reducing power consumption. When exiting dropout region, the buffer current is increased back to normal levels. This parameter change strategy allows the system to maintain voltage regulation when needed while minimizing quiescent current during dropout operation.

Inventive Principle:
Principle #35Parameter changes

2Use of energy by moving object

If the quiescent current is reduced to improve power efficiency, then power consumption decreases, but the voltage regulation stability may be compromised

Engineering Contradiction:
Improvepower consumptionVSAvoidvoltage regulation stability
Core Design Contradiction:
Use of energy by moving objectVSStability of the object's composition

Solution Approach 1:

The patent implements parameter changes by dynamically adjusting the buffer stage current based on the dropout voltage level. The control circuit monitors whether the LDO is in dropout region or not, and accordingly sets the buffer current to appropriate levels - reduced current during dropout to save power, and increased current during normal operation to maintain stability. This conditional parameter adjustment resolves the contradiction between power efficiency and regulation stability.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The system employs dynamic current adjustment where the buffer stage current is not fixed but varies with operating conditions. The control circuit continuously adapts the buffer current based on real-time detection of dropout voltage, ensuring sufficient current for stability when needed while minimizing current for power efficiency when in dropout region. This dynamic behavior allows the system to optimize both power consumption and stability across different operating conditions.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS10331152B2Quiescent current control in voltage regulators
Publication Date: 2019.06.25 DIALOG SEMICONDUCTOR (UK) LTD
  • US10331152B2 patent drawing
  • US10331152B2 patent drawing
  • US10331152B2 patent drawing

AI summary

A circuit for generating an output voltage, and regulating the output voltage to a target voltage, is described. The circuit comprises a pass device coupled between an input voltage level and an output voltage level, an error amplifier stage configured to generate a first control voltage on the basis of a reference voltage and the output voltage, a buffer stage configured to generate a drive signal for the pass device on the basis of the first control voltage, and a tracking circuit configured to track a voltage across the pass device and to generate a second control voltage on the basis of the voltage across the pass device. The buffer stage comprises a variable resistance element, for limiting a current flowing through the buffer stage on the basis of the second control voltage.