LDO Regulator Isolates Controller from Back Power

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Solution Overview

Problem

In memory systems, back power generated during an overload can damage the controller, leading to reliability issues and system failure, as it flows backward from the memory device to the controller through shared power lines.

Innovation Solution

Incorporating a Low Dropout (LDO) Regulator to convert the primary power into a reduced voltage specifically for the interface, isolating the controller from back power by ensuring the reduced power is supplied only to the interface, thereby preventing damage from back power.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the number of storage devices is increased to increase memory capacity, then the memory capacity is improved, but the probability of overload and back power generation is increased

Engineering Contradiction:
Improvememory capacityVSAvoidsystem reliability
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The power supply system is segmented into separate paths: one path supplies power to the memory device, and another path supplies power to the controller through the LDO regulator. This segmentation isolates the controller from back power generated during memory device overload, allowing the system to maintain high capacity while protecting the controller.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The LDO regulator acts as an intermediary component between the power source and the controller. It regulates the power supplied to the controller, preventing back power from reaching the controller even when the memory device experiences overload conditions. This intermediary protects the controller while allowing the memory device to operate at high capacity.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Device complexity

If the interface shares power with the memory device, then the device complexity is reduced, but the controller becomes vulnerable to back power damage

Engineering Contradiction:
Improvepower supply structureVSAvoidback power damage
Core Design Contradiction:
Device complexityVSObject-affected harmful factors

Solution Approach 1:

The LDO regulator serves as an intermediary in the power supply path to the controller. It creates a regulated power interface that is electrically isolated from the memory device's power fluctuations. This allows the interface to share a common power source with the memory device while protecting the controller from back power through the regulatory barrier.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The LDO regulator changes the electrical parameters of the power supply by regulating voltage and current. It transforms the unregulated power from the common source into a stable, protected power supply for the controller, altering the electrical characteristics to prevent back power transmission while maintaining a simplified power distribution structure.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively protects the controller from back power, enhancing the reliability and lifespan of the memory system by isolating it from voltage fluctuations and overloads, ensuring continued operation even during high-capacity data operations.

Implementation Method 1

a Low Dropout (LDO) Regulator configured to convert the first power into the third power and supply the third power to the interface

Methodology Applied
Scientific EffectVoltage regulation: Electrical Resistance

Data Source

PatentUS10007324B2Memory system
Publication Date: 2018.06.26 SK HYNIX INC
  • US10007324B2 patent drawing
  • US10007324B2 patent drawing
  • US10007324B2 patent drawing

AI summary

A memory system includes a memory device, to which a first power is supplied, and in which data is stored; a controller, to which s second power is supplied, and which is configured to control the memory device; an interface, to which a third power is supplied, and which is configured to transmit a command and data between the controller and the memory device; and a Low Dropout (LDO) Regulator configured to convert the first power into the third power and supply the third power to the interface.