LDO Regulator Dynamic Bias Current Adjustment

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Solution Overview

Problem

Low-dropout voltage regulators (LDO) face challenges in managing current consumption and maintaining stable voltage in highly integrated digital circuits, particularly due to fast current spikes and the need for high-bandwidth error amplifiers, which can lead to malfunction and increased power consumption.

Innovation Solution

A low-dropout voltage regulator apparatus with a current adjusting circuit and a detection circuit that adjusts bias current based on input voltage, allowing for reduced quiescent current consumption and enabling a tracking mode where output voltage follows input voltage, reducing power usage and eliminating the need for off-chip components.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If an error amplifier with high bandwidth and slewing is used to provide required load transient response, then the load transient response is improved, but the current consumption increases

Engineering Contradiction:
Improveload transient responseVSAvoidcurrent consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The patent implements dynamic bias current adjustment in the error amplifier by using a bias current control circuit that automatically adjusts the bias current based on operating conditions. When load transient response is required, the bias current increases to provide high bandwidth and slewing capability. During steady-state operation, the bias current is reduced to minimize power consumption. This dynamic adaptation resolves the contradiction between fast response and low power consumption.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the operating parameters of the error amplifier by adjusting the bias current level according to different operational modes. The bias current control circuit monitors system conditions and modifies the bias current parameter accordingly - using higher current values during load transients for fast response, and lower current values during steady state for reduced power consumption, thereby resolving the performance-power tradeoff.

Inventive Principle:
Principle #35Parameter changes

2Stability of the object's composition

If the bias current is increased to maintain stable voltage regulation, then the voltage stability is improved, but the quiescent current consumption increases

Engineering Contradiction:
Improvevoltage stabilityVSAvoidquiescent current consumption
Core Design Contradiction:
Stability of the object's compositionVSUse of energy by stationary object

Solution Approach 1:

The bias current control circuit dynamically adjusts the bias current based on the actual voltage regulation requirements. During steady-state operation where high stability is needed, the circuit maintains sufficient bias current for voltage regulation while reducing it compared to traditional fixed-bias designs. During transient conditions, the bias current is increased to maintain stability. This dynamic adjustment resolves the contradiction between voltage stability and quiescent current consumption.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The error amplifier's bias current control circuit automatically monitors system conditions and self-adjusts the bias current level without external intervention. The circuit detects when voltage regulation is stable and reduces bias current accordingly, and detects when transients occur and increases bias current to maintain stability, enabling the system to serve itself and resolve the stability-power consumption tradeoff autonomously.

Inventive Principle:
Principle #25Self-service

Data Source

PatentEP3311235B1Low-dropout voltage regulator apparatus
Publication Date: 2020.12.02 TDK CORP
  • EP3311235B1 patent drawingFigure 1
  • EP3311235B1 patent drawingFigure 2
  • EP3311235B1 patent drawingFigure 3

AI summary

The low-dropout voltage regulator (LDO) apparatus comprises a voltage input (Vin) coupleable to a power supply (20) and an error amplifier (404). The error amplifier (404) is coupled to the voltage input (Vin) and configured to receive a reference voltage signal and a feedback voltage signal and to generate an output control signal (Ctrl) dependent on the reference voltage signal and the feedback signal. The error amplifier (404) comprises a current adjusting circuit (410). Furthermore, the LDO apparatus (40) comprises a pass transistor (MP) coupled to the error amplifier (404) and configured to receive the output control signal (Ctrl) of the error amplifier (404) and to provide an output current for an output (OUT) of the low-dropout voltage regulator apparatus dependent on the output control signal (Ctrl). Additionally, the LDO comprises a detection circuit (402) coupled to the voltage input (Vin) and configured to provide an output signal on its output dependent on an input voltage (V_in) provided on the voltage input (Vin) of the LDO apparatus (40). The LDO apparatus (40)comprises a bias generator (416) coupled with the output of the detection circuit (402)and configured to provide a bias current (I_bias) on a bias input of the current adjusting circuit (410) of the error amplifier (404) dependent on the output signal of the detection circuit (402). Also, the LDO comprises an on-chip output capacitor.