LDO Regulator Fast Current Limit via Transistor Clamping

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Solution Overview

Problem

Conventional Low Drop-Out (LDO) regulators face challenges in quickly limiting excessive load currents, leading to potential component damage and reduced efficiency due to the series connection of sensing resistors and transistors, which increases equivalent impedance and power waste.

Innovation Solution

The LDO regulator incorporates an adjustable reference voltage circuit and an additional transistor to clamp the current control signal, preventing excessive load currents and eliminating the need for a sensing resistor, thereby reducing power waste and enhancing efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a sensing resistor is serial-connected between the input voltage source and the transistor to detect load current, then the load current can be limited by the comparator, but the equivalent impedance increases and power waste increases

Engineering Contradiction:
Improvecurrent limit protectionVSAvoidpower waste
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The patent extracts and removes the sensing resistor from the series connection between the input voltage source and the transistor. Instead of using a physical sensing resistor to detect current, the invention uses the transistor's own characteristics and a parallel feedback mechanism to achieve current limiting without the power-wasting series resistor.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces a comparator as an intermediary element that monitors the transistor's source-drain voltage and compares it with a reference voltage. This intermediary mechanism enables current detection and limiting functionality without requiring a series sensing resistor, thus avoiding the associated power loss.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If a sensing resistor and comparator are used to detect and limit load current, then current limit control is achieved, but reaction time is delayed and excessive current can damage components

Engineering Contradiction:
Improvecurrent limit controlVSAvoidreaction time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent implements preliminary action by continuously monitoring the transistor's source-drain voltage through the comparator before excessive current can cause damage. The comparator is always ready to detect voltage changes and immediately trigger the current limit signal, eliminating detection delays associated with traditional sensing resistor methods.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent employs a feedback mechanism where the comparator continuously monitors the transistor's operating state and provides real-time control signals. When the source-drain voltage exceeds the reference voltage, the comparator immediately generates a current limit signal that feeds back to the transistor's gate, creating a rapid closed-loop control system that prevents component damage.

Inventive Principle:
Principle #23Feedback

3Measurement precision

If the series connection of sensing resistor and transistor is used, then current detection is possible, but the equivalent impedance between input and output voltage sources increases

Engineering Contradiction:
Improvecurrent detectionVSAvoidequivalent impedance
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent extracts the sensing resistor from the series connection, removing the source of increased equivalent impedance. Current detection is achieved indirectly by monitoring the transistor's source-drain voltage, which reflects the current state without adding series resistance to the circuit.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS7612549B1Low drop-out regulator with fast current limit
Publication Date: 2009.11.03 ADVANCED ANALOG TECH INC
  • US7612549B1 patent drawing
  • US7612549B1 patent drawing
  • US7612549B1 patent drawing

AI summary

An LDO with fast current limit includes P-type transistor, an error amplifier, an adjustable reference voltage circuit for generating an adjustable reference voltage, and an N-type transistor. The P-type transistor includes a first end coupled to the input voltage source, a second end for outputting an output voltage source, and a control end for receiving a current control signal in order to control the current of the output voltage source. The error amplifier generates the current control signal according to the reference voltage and a voltage divided from the output voltage source. N-type transistor includes a first end coupled to the output end of the error amplifier, a second end coupled to the input voltage source, and a control end for receiving the adjustable reference voltage. When the N-type transistor is turned on, the voltage of the current control signal is clamped by the adjustable reference voltage.