LDO Regulator Gate Voltage Control for Inrush Current
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Solution Overview
Problem
Low drop out (LDO) regulators face challenges in preventing overshooting voltage and inrush current, which can cause malfunction and damage to loads, especially in mobile applications where current consumption is critical.
Innovation Solution
The LDO regulator includes a controller that delays the regulator enable signal and increases the gate voltage of the pass transistor, using a buffer, delay cell, inverter, logical conjunction, and Sheffer stroke units to manage the gate voltage of a PMOS transistor, thereby reducing current flow and preventing overshooting voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the LDO regulator immediately enables the load upon receiving the regulator enable signal, then the response time is fast, but overshooting voltage and inrush current occur causing malfunction and damage to the load
Solution Approach 1:
The controller performs preliminary actions by first increasing the gate voltage of the pass transistor to reduce current flow before enabling the load. This preliminary current reduction prevents inrush current when the load is subsequently enabled, protecting against damage while maintaining reliable operation.
Solution Approach 2:
The controller provides beforehand cushioning by generating a gate voltage that reduces current flow through the pass transistor before the load enable signal is generated. This cushioning effect prevents overshooting voltage and inrush current from damaging the load, ensuring reliable protection without excessive delay.
2Reliability
If the gate voltage of the pass transistor is increased to reduce current flow, then inrush current and overshooting voltage are prevented, but the circuit complexity increases due to additional control components
Solution Approach 1:
The controller circuit is segmented into distinct functional units: a buffer for signal conditioning, a delay cell for timing control, and logic units (inverter, logical conjunction, Sheffer stroke) for gate voltage control. This segmentation allows each component to perform its specific function efficiently, achieving reliable voltage regulation while keeping the overall circuit manageable through modular design.
Solution Approach 2:
The controller acts as an intermediary between the regulator enable signal and the load enable signal. It mediates the transition by first adjusting the gate voltage of the pass transistor to reduce current flow, then subsequently enabling the load. This intermediary control prevents direct connection of the load to the power supply, avoiding inrush current and overshooting voltage while maintaining system reliability.
Data Source
AI summary
In a low drop out (LDO) regulator and a semiconductor device including the LDO regulator, the LDO regulator regulates a power supply voltage and applies the regulated power supply voltage to a load. The LDO regulator comprises: an output node connected to the load; a pass transistor that applies a power supply voltage to the output node; and a controller that generates a load enable signal enabling the load by delaying a regulator enable signal by a first delay time, and that increases a gate voltage of the pass transistor after receiving the regulator enable signal to thereby reduce a current flowing through the pass transistor.