LDO Voltage Regulator High PSRR Depletion MOS Reference
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Solution Overview
Problem
Existing low dropout (LDO) voltage regulators suffer from poor power supply rejection ratio (PSRR) and high noise due to the simplicity of their voltage reference circuits and noise contributions from resistors and transistors, which affects their performance in power management systems.
Innovation Solution
The proposed LDO voltage regulator incorporates a voltage reference circuit with depletion and enhancement MOS transistors configured as a source follower to provide a stable voltage reference, and an error amplifier with a MOS differential stage to suppress noise, resulting in a high PSRR and low noise output.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If a bandgap voltage reference circuit is used, then the reference voltage stability is improved, but the integrated circuit area increases substantially
Solution Approach 1:
The patent changes the operating parameters of MOS transistors (using depletion mode transistors with specific W/L ratios) to achieve voltage reference stability without requiring the substantial area of traditional bandgap circuits. By operating transistors in specific regions and configuring them as source followers, the circuit achieves stability through parameter optimization rather than complex structure.
Solution Approach 2:
The patent extracts the essential function of voltage reference stability from the complex bandgap circuit and implements it using simplified MOS transistor configurations. The core stabilizing mechanism is separated from the bulky bandgap structure and realized through selective use of depletion and enhancement mode MOS transistors in a compact arrangement.
2Area of stationary object
If simpler voltage reference circuits are used, then the integrated circuit area is reduced, but the power supply rejection ratio deteriorates
Solution Approach 1:
The patent creates a composite voltage reference structure by combining depletion mode MOS transistors (Q1, Q2) and enhancement mode MOS transistors (Q3, Q4) in a specific configuration. This composite approach leverages the complementary characteristics of different transistor types to achieve high PSRR in a compact circuit, resolving the contradiction between simplicity and performance.
Solution Approach 2:
The patent introduces intermediate voltage reference nodes (Vref1, Vref2) that mediate between the input power supply and the final output. These intermediate references, generated through the MOS transistor network, provide progressive filtering and rejection of power supply variations, enabling high PSRR without requiring a large complex circuit.
3Ease of operation
If resistors are used in the output voltage divider, then the voltage division function is achieved, but noise is generated that appears in the regulated output voltage
Solution Approach 1:
The patent substitutes traditional resistor-based voltage division with a MOS transistor-based active division network. By using the controlled resistance characteristics of MOS transistors (particularly depletion mode transistors with high channel resistance), the circuit achieves voltage division without the thermal noise inherent in passive resistors, eliminating the harmful noise effect while maintaining the division function.
4Loss of energy
If the input voltage is kept close to the output voltage for high efficiency, then the power loss is reduced, but the regulation capability becomes more difficult to maintain
Solution Approach 1:
The patent optimizes the operating parameters of the pass transistor and error amplifier to maintain regulation capability even when the voltage differential between input and output is minimal (as low as 1V). By adjusting transistor biasing and gain parameters, the circuit achieves stable regulation in the low dropout condition, enabling high efficiency operation without sacrificing control.
Data Source
AI summary
A low dropout voltage regulator includes an error amplifier, a voltage divider, and a voltage reference/amplifier circuit. The error amplifier has first and second input terminals, a power supply terminal for receiving an input voltage, and an output terminal for providing a regulated output voltage. The voltage divider provides a feedback voltage as a predetermined fraction of said regulated output voltage. The voltage reference/amplifier circuit provides a first voltage to said first input terminal of said error amplifier that varies inversely with variations of said feedback voltage, and provides a second voltage to said second input terminal of said error amplifier that varies by substantially the same amount over temperature as variations in said first voltage.