LDO Regulator Voltage Buffer for High PSRR and Compact Layout
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Solution Overview
Problem
Low voltage drop out (LDO) regulators face challenges in maintaining a high power supply rejection ratio (PSRR) due to AC perturbations in the input voltage, which degrades their performance, and require large components and additional power consumption with the use of high voltage regulators to mitigate this issue.
Innovation Solution
A low voltage drop out (LDO) regulator design that includes a voltage buffer to convert the input voltage, maintaining the AC component, a control stage with cascaded amplifiers, and an output stage with a power transistor, along with a compensation block for pole splitting, allowing the AC perturbations to be present at both the source and gate of the power transistor, thereby canceling their effect and improving PSRR.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a high voltage regulator is added to convert the high input voltage to a lower voltage before the control stage, then the power supply rejection ratio is improved, but the device complexity and power consumption increase
Solution Approach 1:
The patent introduces a voltage buffer as an intermediary component between the input voltage source and the control stage. This buffer converts the high input voltage to a lower voltage level while maintaining the AC perturbation signal, thereby improving PSRR without requiring a full high voltage regulator. The voltage buffer acts as a mediator that performs partial voltage conversion while preserving the rejection of high-frequency noise.
Solution Approach 2:
The patent extracts only the essential function needed for PSRR improvement - the DC voltage conversion - while deliberately leaving the AC perturbation signal intact. This is achieved by designing the voltage buffer to convert DC levels but pass AC signals through, thus improving power supply rejection without the complexity of a complete regulator stage.
2Reliability
If a high voltage regulator is added to convert the high input voltage to a lower voltage, then the power supply rejection ratio is improved, but the power consumption increases
Solution Approach 1:
The patent applies partial action by implementing only the necessary portion of voltage conversion - converting the DC component from high to low voltage - while intentionally not filtering out the AC perturbation. This partial conversion approach achieves PSRR improvement without the excessive power consumption of a full regulator that would also eliminate the AC signal.
Solution Approach 2:
The voltage buffer serves as a low-power intermediary that performs selective voltage conversion. It converts DC levels to improve PSRR while maintaining AC signals, thereby achieving the desired power supply rejection with minimal additional power consumption compared to a full high voltage regulator.
3Ease of operation
If the AC perturbation is filtered out by the high voltage regulator, then the converted voltage has reduced AC content, but the power supply rejection ratio deteriorates
Solution Approach 1:
The patent applies local quality by treating the DC and AC components of the voltage signal differently. The voltage buffer converts the DC component to a lower level while deliberately preserving the AC perturbation signal. This differential treatment of signal components achieves the desired PSRR characteristic by maintaining AC content that can be properly rejected by the control stage.
4Reliability
If elements of great sizes are used to sustain high voltage in the LDO regulator, then the high voltage can be sustained, but the layout area increases
Solution Approach 1:
The patent segments the voltage handling function by introducing a voltage buffer that converts high voltage to low voltage before the main LDO control stage. This segmentation allows the high-voltage-sustaining elements to be isolated in the buffer stage, while the main control and output stages can use smaller, lower-voltage elements, thereby reducing the overall layout area.
Solution Approach 2:
The voltage buffer acts as an intermediary that handles the high voltage conversion, allowing the subsequent LDO control stage to operate at lower voltages with smaller elements. This intermediary approach enables high voltage sustainability at the input while using compact, low-voltage components in the main regulator circuitry, reducing total layout area.
Data Source
AI summary
A low voltage drop out (LDO) regulator is disclosed. The LDO regulator has a voltage buffer for receiving an input voltage containing a DC component and an AC component, converting the input voltage into a converted voltage having a lower DC component and an AC component following that of the input voltage; a control stage applied with the converted voltage; and an output stage applied with the input voltage. The output stage is controlled by the control stage to output an output voltage of a specific level. In the LDO regulator, elements of small sizes can be used to save a layout area thereof. In the meanwhile, the LDO regulator can maintain a high power supply rejection ratio (PSRR) characteristic.