Low Drop-Out Regulator with Zero Compensation Circuit

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Solution Overview

Problem

Low drop-out regulators face instability and reduced power efficiency due to varying load conditions, which affect the frequency response and pole placement within the unit gain bandwidth, leading to potential instability and inefficiency.

Innovation Solution

Incorporating a zero compensation circuit with a rail-to-rail buffer and a CMOS device, which adjusts driving current independently of load current, and using a heavy and light load unit configuration to manage pole placement and frequency response, ensuring stability and efficiency across a wide input voltage range.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If the buffer driving current is adjusted according to load current, then power efficiency improves, but frequency response stability deteriorates due to varying pole placement

Engineering Contradiction:
Improvepower efficiencyVSAvoidfrequency response stability
Core Design Contradiction:
Loss of energyVSStability of the object's composition

Solution Approach 1:

The patent implements dynamic adjustment of buffer driving current through a current mirror circuit that responds to load current variations. The buffer driving current is dynamically controlled to match load conditions, improving power efficiency while maintaining stability through coordinated compensation circuit adjustments.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent employs feedback mechanisms where the compensation circuit monitors pole placement and frequency response characteristics. When load current variations cause pole migration, the feedback system adjusts compensation parameters to maintain stable frequency response, resolving the contradiction between efficiency and stability.

Inventive Principle:
Principle #23Feedback

2Stability of the object's composition

If the zero compensation circuit is used to compensate poles, then frequency response stability improves, but device complexity increases

Engineering Contradiction:
Improvefrequency response stabilityVSAvoidcircuit complexity
Core Design Contradiction:
Stability of the object's compositionVSDevice complexity

Solution Approach 1:

The compensation circuit is designed to perform multiple functions: compensating for pole shifts, maintaining frequency response stability, and adapting to different load conditions. By integrating these functions into a single circuit block, the patent reduces overall device complexity while achieving the desired stability improvements.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent adjusts compensation parameters dynamically based on operating conditions. The zero compensation circuit modifies its compensation characteristics in response to load current changes, allowing effective pole compensation without requiring complex additional circuitry for each operating mode.

Inventive Principle:
Principle #35Parameter changes

3Adaptability or versatility

If the buffer uses rail-to-rail CMOS configuration, then input voltage range expands, but power consumption increases

Engineering Contradiction:
Improveinput voltage rangeVSAvoidpower consumption
Core Design Contradiction:
Adaptability or versatilityVSUse of energy by moving object

Solution Approach 1:

The rail-to-rail buffer is implemented with dynamic current control through the current mirror circuit. The buffer driving current is adjusted according to load conditions, allowing the buffer to operate efficiently across the full input voltage range while consuming only the necessary power for each operating condition.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS9256237B2Low drop-out regulator
Publication Date: 2016.02.09 SAMSUNG ELECTRONICS CO LTD
  • US9256237B2 patent drawing
  • US9256237B2 patent drawing
  • US9256237B2 patent drawing

AI summary

Exemplary embodiments disclose a low drop-out regulator including an error amplification unit which includes a zero compensation circuit configured to compensate a plurality of poles which are generated by an output terminal and a buffer, the error amplification unit is configured to generate a first comparison signal in response to a reference voltage and a feedback voltage, the buffer is configured to generate a second comparison signal in response to the first comparison signal and an input voltage, a pass unit configured to provide an output voltage and a load current to the output terminal in response to the second comparison signal and the input voltage, and a feedback unit configured to provide the feedback voltage to the error amplification unit in response to the output voltage. A driving current of the buffer is independently adjusted with respect to the load current.