Current-Mode Ripple Cancellation in LDOs for High-Frequency PSR
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Low dropout regulators (LDOs) face challenges in achieving high power supply rejection (PSR) across a wide range of frequencies without increasing quiescent power consumption or silicon surface area, especially when used in noise-sensitive applications like system-on-chip, sensor modules, and RF circuits.
Innovation Solution
The implementation of a current-mode feedforward ripple canceller (CFFRC) in the LDO, which replicates supply ripple to the gate of a p-type pass device without using a summing amplifier, allowing for high PSR performance without specific calibration and reduced quiescent current consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If a conventional LDO is used to regulate voltage, then output voltage stability is improved, but power supply rejection ratio deteriorates at high frequencies
Solution Approach 1:
The LDO is segmented into two functional paths: a feedback control path for DC regulation and a feedforward ripple cancellation path for AC noise rejection. The feedforward path includes a ripple sensor that detects input voltage ripple and a ripple canceller that generates a compensating signal, while the feedback path maintains output voltage stability. This segmentation allows independent optimization of both PSR and output stability.
Solution Approach 2:
The feedforward ripple cancellation path performs preliminary action by detecting and canceling input voltage ripple before it reaches the output. The ripple sensor continuously monitors VIN for ripple components, and the ripple canceller proactively generates a compensating signal that counteracts the ripple effect on VOUT, preventing rather than correcting the disturbance.
2Object-affected harmful factors
If filtering devices are added to improve PSR, then power supply rejection is improved, but device complexity increases
Solution Approach 1:
The feedforward ripple canceller is designed to be universally applicable across different LDO configurations and frequency ranges. The same basic architecture can handle various ripple frequencies and amplitudes without requiring additional filtering components, making the solution multi-functional and avoiding increased device complexity.
3Object-affected harmful factors
If larger capacitors are used to improve PSR response, then power supply rejection is improved, but quiescent power consumption increases
Solution Approach 1:
The passive mechanical filtering approach using large capacitors is replaced with an active electronic feedforward cancellation system. Instead of relying on capacitor impedance to reject ripple, the system uses electronic sensing and active signal cancellation, achieving superior PSR with minimal quiescent current consumption.
4Object-affected harmful factors
If external filtering capacitors are added, then PSR response is improved, but silicon surface area increases
Solution Approach 1:
The filtering function is extracted from the traditional capacitor-based approach and implemented through dedicated feedforward cancellation circuitry integrated within the LDO. The ripple sensing and cancellation functionality is taken out as a separate functional block that operates independently, achieving PSR improvement without requiring additional external capacitors or increased silicon area.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach achieves a PSR of greater than 68 dB up to 2 MHz, improving performance by up to 25 dB over other techniques, while maintaining low quiescent current and minimizing noise propagation to the output, thus being suitable for various noise-sensitive applications.
Implementation Method 1
The CFFRC is configured to sense a voltage ripple in VIN, convert the sensed voltage ripple to a current representation of the voltage ripple
Data Source
AI summary
In an example, an apparatus includes an error amplifier, a buffer, a transistor, and a current-mode feedforward ripple canceller (CFFRC). The error amplifier has an amplifier output, a first input, and a second input, the error amplifier second input configured to receive a reference voltage. The buffer has a buffer input and a buffer output, the buffer input coupled to the error amplifier output. The transistor has a gate, a source, and a drain, the gate coupled to the buffer output, the drain coupled to the first input. The transistor is configured to receive an input voltage (VIN) at the source and provide an output voltage at the drain. The CFFRC has a CFFRC input and a CFFRC output, the CFFRC output coupled to the gate, and the CFFRC input configured to receive VIN.