LDO Self-Test Circuit for Feedback Loop Defect Detection
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Solution Overview
Problem
Existing test techniques for power integrated circuits (ICs) are insufficiently selective in detecting defects, particularly in power IC sub-circuits, leading to high failure rates due to masked weak performance during testing.
Innovation Solution
Implementing internal test node structures within power ICs to configure built-in amplifiers into a self-testing mode, using a servo-loop configuration to monitor the performance via a cyclical signal sensitive to the regulator control feedback loop characteristics, allowing for cost-effective determination of IC performance during manufacture and in-field testing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If robust feedback loops are built to compensate for manufacturing variations, then performance over a wide range of PVT process corners is improved, but detection of weak performance in power IC sub-circuits during testing deteriorates
Solution Approach 1:
The patent segments the testing process into two distinct modes: a normal regulation mode where the feedback loop operates to maintain performance, and a test mode where the feedback loop is disabled or bypassed to allow direct measurement of sub-circuit performance. This segmentation allows both robust performance and accurate defect detection to coexist by separating their operational contexts.
Solution Approach 2:
The patent introduces test node structures as intermediary elements that provide direct access to internal sub-circuit nodes without going through the feedback loop. These intermediaries allow measurement signals to bypass the compensating feedback mechanism, enabling direct observation of weak performance that would otherwise be masked.
2Ease of operation
If black box model testing is used to examine external terminals, then testing simplicity is improved, but selectivity in detecting defects deteriorates
Solution Approach 1:
The patent segments the IC into testable units by providing access to internal sub-circuit nodes through test node structures. This allows the testing to be performed in a modular fashion, combining the simplicity of external terminal access with the precision of internal node measurement, thereby resolving the contradiction between testing simplicity and defect detection selectivity.
3Measurement precision
If internal test node structures are implemented to enable self-testing, then defect detection capability is improved, but device complexity increases
Solution Approach 1:
The patent merges the test node structures with the existing power IC fabrication process, integrating the testing functionality into the device itself rather than adding separate external testing equipment. The test nodes are combined with the regulation circuit nodes, allowing the same physical structures to serve both functional and testing purposes, thereby minimizing the increase in device complexity.
Solution Approach 2:
The test node structures are designed to be multi-functional, serving both as regular circuit nodes during normal operation and as measurement access points during testing. This universality allows the IC to perform its voltage regulation function while simultaneously providing built-in testing capability, reducing the need for additional dedicated test structures.
Data Source
AI summary
The present disclosure describes systems and methods for identifying defective components in a power integrated circuit. In one such system, a voltage regulator circuit is embedded in an integrated circuit device, wherein the voltage regulator circuit includes a control feedback loop having a compensation capacitor that is configured to maintain a stable output voltage of the voltage regulator voltage at a set value or range. Additionally, a test circuitry is embedded in the integrated circuit device, wherein the test circuitry comprises a voltage source that is configured to generate a cyclical test input signal that passes through the control feedback loop. Accordingly, the test circuitry is configured to provide a test output signal to an output pin of the integrated circuit device that indicates a performance level of the compensation capacitor in the control feedback loop of the voltage regulator circuit. Other systems and methods are also included.