256QAM OFDM Bit Mapping for LDPC Reception Reliability
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Solution Overview
Problem
The reception performance of receivers using LDPC codes with bit-interleaved coding and modulation (BICM) can be improved by optimizing the permutation rules applied to LDPC codeword bits prior to mapping, as existing methods lead to suboptimal performance due to non-interleaved bit mapping to constellation symbols.
Innovation Solution
A transmission processing method that encodes information bits into a low-density parity check code with a code rate of 7/15 and a codeword length of 16200, followed by parity and column-row interleaving, and bit-to-cell demultiplexing with a specific permutation rule to optimize LDPC codeword bits for 256QAM constellations, improving reception performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional bit-interleaving and mapping methods are used, then the system is simple to implement, but reception performance is suboptimal
Solution Approach 1:
The patent applies preliminary bit permutation to LDPC codeword bits before mapping to constellation symbols. Specifically, it performs parity interleaving followed by column-row interleaving with twist, and finally bit-to-cell demultiplexing with optimized permutation rules. This preliminary reordering of bits ensures that after channel transmission and reception, the bits are properly aligned for LDPC decoding, significantly improving reception performance without adding complex hardware structures.
2Reliability
If non-interleaved bit mapping is used, then the mapping process is simple, but error correction performance deteriorates
Solution Approach 1:
The patent segments the LDPC codeword bits into different groups and applies different permutation operations to each segment. The bit-interleaving process divides codeword bits into information bits and parity bits, applies parity interleaving to the parity portion, then performs column-row interleaving with twist on the entire sequence. This segmented approach ensures that bits experiencing similar channel conditions are distributed across different constellation symbols, improving error correction performance.
Solution Approach 2:
The patent introduces asymmetric permutation rules in the bit-to-cell demultiplexing stage. Instead of uniform mapping, it applies specific permutation patterns that asymmetrically reorder bits based on their position and importance. This asymmetric treatment optimizes the mapping between LDPC codeword bits and constellation symbols, enhancing the effectiveness of error correction while managing the complexity of the permutation process.
Data Source
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AI summary
Information bits are encoded according to an outer BCH code (111) and an inner low density parity check code (115) with code rate 7/15 and a codeword length of 16200. The resulting codeword bits are bit-interleaved (120) and the interleaved bits are demultiplexed (130) into 8 sequences of bits. The 8 sequences of bits are permuted (130) according to a predetermined permutation rule: v0 = b2, v1 = b6, v2 = b0, v3 = b1, v4 = b4, v5 = b5, v6 = b3, v7 = b7, and mapped onto symbols of a 256 QAM constellation (140). A transmission frame is built from these symbols (1030) and an OFDM generator (1040) processes the frame and outputs a transmission signal.