Bit-Group LDPC Interleaving for 64-Symbol Burst Error Spreading
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Solution Overview
Problem
Bit-Interleaved Coded Modulation (BICM) systems face rapid performance degradation unless burst errors in digital broadcast channels are effectively distributed, necessitating an optimized bit interleaver design for modulation order and error correction code parameters.
Innovation Solution
A bit interleaver optimized for an LDPC coder with a length of 16200 and code rate of 2/15, using 64-symbol mapping, is designed to effectively distribute burst errors by interleaving the LDPC codeword on a bit group basis with a specific permutation order, suitable for next-generation broadcasting systems like ATSC 3.0.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a bit interleaver is designed for BICM systems, then modulation efficiency and bandwidth utilization are improved, but performance degrades rapidly when burst errors occur in the channel
Solution Approach 1:
The patent segments the LDPC codeword into multiple bit groups (e.g., 45 groups of 360 bits each) and applies independent interleaving operations to each group. This segmentation allows the system to handle burst errors at the group level while maintaining overall transmission efficiency, resolving the contradiction between bandwidth efficiency and error performance.
Solution Approach 2:
The patent introduces a new dimension of interleaving at the bit group level rather than treating the entire codeword as a single sequence. By defining permutation orders that operate on groups of bits rather than individual bits, the system achieves better error distribution while maintaining the bandwidth efficiency of high-order modulation.
2Adaptability or versatility
If a generic bit interleaver is used, then system flexibility is maintained, but performance is not optimized for specific modulation orders and code parameters
Solution Approach 1:
The patent defines different permutation orders tailored to specific modulation schemes (e.g., 64-QAM) and code parameters (e.g., LDPC with length 16200 and rate 2/15). Each bit group undergoes a locally optimized interleaving operation suited to its specific context, achieving optimal performance for given parameters while maintaining the ability to adapt to different configurations.
Solution Approach 2:
The patent optimizes performance by adjusting the permutation order parameters based on specific modulation orders and code rates. For example, different permutation sequences are defined for 64-symbol mapping versus other modulation schemes, allowing the system to achieve optimal error performance for each parameter configuration.
3Device complexity
If burst errors are not distributed, then system complexity remains low, but performance degradation occurs rapidly in BICM systems
Solution Approach 1:
By segmenting the codeword into bit groups and applying simple permutation operations to each group independently, the patent achieves effective burst error distribution without requiring complex interleaving structures. The segmentation approach maintains low computational complexity while significantly improving error performance.
Solution Approach 2:
The patent applies preliminary interleaving at the bit group level before modulation, distributing potential burst errors across different symbol groups in advance. This preliminary action prevents rapid performance degradation without adding complexity during the actual transmission and decoding processes.
Data Source
AI summary
A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 16200 and a code rate of 2/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 64-symbol mapping.