Vector-Based LDPC Base Matrix Layout for Lower Decoder Switching Complexity
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Solution Overview
Problem
Current LDPC base matrix generation for 5G wireless communications is complex and energy-intensive due to large block sizes and high throughput requirements, particularly in eMBB, where hundreds of code blocks with thousands of information bits need to be processed, and existing methods do not efficiently reduce the complexity and chip area of switching networks.
Innovation Solution
The LDPC base matrix is adapted to comprise non-identical, row-orthogonal parts generated using starting vectors with cyclic shifting or interleaving, allowing for column-wise combinations that reduce the complexity of switching networks and enable efficient decoding, with techniques such as row reusing, sparsing, and cyclic shifting to create rate-compatible matrices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If traditional LDPC base matrix generation methods are used to handle large block sizes and high throughput requirements, then decoding capability is maintained, but complexity and chip area of switching networks increase significantly
Solution Approach 1:
The base matrix is divided into multiple parts, each part being processed separately through cyclic shifting and interleaving operations. This segmentation allows the decoder to handle large block sizes by breaking them into manageable segments, reducing the complexity of switching networks while maintaining decoding capability for high throughput requirements
Solution Approach 2:
The patent employs dynamic generation of base matrix parts through cyclic shifting and interleaving operations based on received parameters. This dynamic approach allows the system to adapt to different code block sizes and throughput requirements without requiring fixed, complex switching networks for all possible scenarios, thereby reducing chip area while maintaining decoding performance
2Productivity
If conventional base matrix processing is applied to hundreds of code blocks with thousands of information bits, then throughput requirements are met, but energy consumption increases
Solution Approach 1:
The base matrix parts are pre-processed through cyclic shifting and interleaving operations before actual decoding. This preliminary action prepares the data structure in advance, allowing the decoder to operate more efficiently during throughput-critical operations, thereby reducing energy consumption while maintaining high throughput capability for handling hundreds of code blocks
3Reliability
If full base matrix storage is implemented to support large block sizes, then decoding accuracy is maintained, but storage requirements increase
Solution Approach 1:
Instead of storing the complete base matrix, the patent generates base matrix parts through copying and transforming smaller base units using cyclic shifting and interleaving operations. This copying approach maintains decoding accuracy by preserving the essential structural properties of the base matrix while significantly reducing storage requirements for large block sizes
Data Source
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AI summary
A base matrix is applied to an LDPC coder. The base matrix includes multiple parts, each including multiple of rows and columns, and containing integers, each representative of an identity matrix cyclically shifted in accordance with the integer or representative of an all-zero matrix. At least two of the multiple parts are configured such that their respective column-wise combinations of rows represents a same starting vector, cyclically shifted or interleaved, with zero or more but not all integers not indicative of the all-zero matrix of the same vector substituted by integers indicative of the all-zero matrix. The at least two of the multiple parts are not identical. The applied base matrix is used for one of encoding data using the LDPC coder or decoding data using the LDPC coder.