LDPC Bit-Flipping Decoding Using Reliability-Guided Error Correction
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Solution Overview
Problem
Current NAND-based data storage technologies are costly while magnetic storage technologies are less desirable due to lower weight and slower read/write operations, necessitating a method to lower costs while maintaining performance levels.
Innovation Solution
A reliability-assisted bit-flipping decoding algorithm (RABF) for LDPC codes that computes an initial syndrome, determines unsatisfied checks, and performs bit flip operations based on reliability values to achieve error correction, reducing the need for high-power soft-message decoding.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If soft-message decoding is used to achieve error correction, then error correction performance is improved, but hardware power consumption increases
Solution Approach 1:
The decoding process is segmented into two distinct phases: a hard decision phase using bit-flipping operations for initial error correction, and a soft decision phase using reliability values for refined correction. This segmentation allows the system to achieve high error correction performance while minimizing power consumption by using the simpler hard decision phase first and only proceeding to the more power-intensive soft decision phase when necessary.
Solution Approach 2:
The decoder dynamically transitions between hard decision and soft decision modes based on the error correction needs. The system starts with hard decision bit-flipping operations and dynamically switches to soft decision operations using reliability values when the error correction performance requires more sophisticated processing, optimizing the balance between performance and power consumption.
2Quantity of substance
If NAND-based technology is used to achieve high density data storage, then storage capacity is improved, but cost increases
Solution Approach 1:
The patent employs a decoding algorithm that uses simpler, less expensive hard decision operations as the primary error correction mechanism. By relying on bit-flipping operations rather than requiring complex soft decision decoding hardware, the system reduces the manufacturing cost of the storage device while maintaining high storage capacity through NAND-based technology.
3Ease of manufacture
If magnetic storage technology is used to achieve data storage, then cost is reduced, but read/write speed decreases
Solution Approach 1:
The patent replaces complex mechanical or hardware-based error correction systems with an algorithmic approach using bit-flipping operations and reliability calculations. This substitution allows the use of simpler, lower-cost storage hardware while maintaining high read/write speeds through efficient software-based error correction rather than requiring complex hardware decoding circuits.
Data Source
AI summary
A method for decoding low-density parity check (LDPC) codes, includes computing an initial syndrome of an initial output, obtaining an initial number of unsatisfied checks based on the computed initial syndrome, and when the initial number of unsatisfied checks is greater than zero, computing a reliability value with a parity check, performing a bit flip operation, computing a subsequent syndrome of a subsequent output, and ending decoding when a number of unsatisfied checks obtained based on the computed subsequent syndrome is equal to zero.