LDPC Bit-Group Interleaver for QPSK Burst Error Distribution
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Solution Overview
Problem
Bit-Interleaved Coded Modulation (BICM) systems suffer from rapid performance degradation due to burst errors in digital broadcast channels, necessitating an optimized bit interleaver design for modulation order and error correction code parameters.
Innovation Solution
A bit interleaver is designed for an LDPC coder with a length of 64800 and code rate of 7/15, using a specific permutation order for bit group-based interleaving, optimized for QPSK modulation, to effectively distribute burst errors in next-generation broadcasting systems like ATSC 3.0.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a bit-by-bit interleaver is used in BICM systems, then bandwidth efficiency is improved and flexibility is enhanced, but performance degrades rapidly due to burst errors in digital broadcast channels
Solution Approach 1:
The interleaver divides the codeword into multiple bit groups, where each bit group contains a specific number of bits (e.g., 360 bits). This segmentation allows the system to process and interleave data in manageable units while maintaining the overall structure needed for error correction, thereby preserving both bandwidth efficiency and error correction performance.
Solution Approach 2:
The patent introduces an optimized bit-group-based interleaver as an intermediary component between the LDPC encoder and the modulator. This interleaver acts as a mediator that redistributes burst errors across different bit groups before modulation, preventing catastrophic error patterns while maintaining the efficiency benefits of BICM systems.
2Device complexity
If a simple bit interleaver structure is used, then device complexity is reduced, but burst errors cannot be effectively distributed
Solution Approach 1:
The patent optimizes specific parameters of the bit-group-based interleaver, including the number of bits per bit group (e.g., 360 bits) and the interleaving pattern within each bit group. By carefully selecting these parameters, the system achieves effective burst error distribution without requiring complex interleaver structures, thus balancing simplicity and performance.
3Reliability
If the bit interleaver is optimized for specific modulation order and code rate, then error correction performance is improved, but adaptability to different configurations is reduced
Solution Approach 1:
The patent designs a universal bit-group-based interleaver structure that can be applied to various modulation orders (e.g., QPSK, 16-QAM, 64-QAM) and different LDPC code rates. The interleaver's bit group size and interleaving pattern are configured based on the specific system requirements, allowing a single design to serve multiple functions across different broadcasting standards and configurations.
Data Source
AI summary
A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 7/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for quadrature phase shift keying (QPSK) modulation.