LDPC Bit-Group Interleaving for Robust Modulation Mapping

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Solution Overview

Problem

There is a need for improved decoding and receiving performance in digital broadcasting services, particularly in high-quality digital television and portable multimedia systems, where existing methods do not adequately support various receiving methods and fail to provide enhanced user experiences.

Innovation Solution

A transmitting apparatus and method that performs LDPC encoding, interleaving, and modulation to map bits from a predetermined bit group of a low-density parity-check (LDPC) codeword onto modulation symbols, using a parity check matrix and an interleaver to enhance decoding and receiving performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional transmission methods are used, then device complexity is reduced, but decoding and receiving performance deteriorates

Engineering Contradiction:
Improvedecoding performanceVSAvoidtransmission processing complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The LDPC codeword is divided into multiple bit groups, and each bit group is independently interleaved and mapped to modulation symbols. This segmentation allows the system to achieve improved decoding performance through structured bit group processing while managing complexity by processing smaller units independently rather than the entire codeword at once.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The interleaver performs preliminary rearrangement of bit groups before modulation mapping. By pre-organizing the bit groups in an optimized sequence that considers both channel characteristics and modulation requirements, the system achieves better receiving performance without adding complexity during the actual transmission and decoding phases.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If bit mapping is optimized for receiving performance, then decoding performance improves, but processing complexity increases

Engineering Contradiction:
Improvereceiving performanceVSAvoidinterleaving and mapping complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

Different bit groups are mapped to different positions within modulation symbols based on their specific characteristics and importance. The mapping strategy assigns critical bits to more robust symbol positions while less critical bits go to positions that can tolerate higher error rates, achieving optimized receiving performance through localized quality differentiation without requiring complex global optimization.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS11637655B2Transmitting apparatus and interleaving method thereof
Publication Date: 2023.04.25 SAMSUNG ELECTRONICS CO LTD
  • US11637655B2 patent drawing
  • US11637655B2 patent drawing
  • US11637655B2 patent drawing

AI summary

A transmitting apparatus is provided. The transmitting apparatus includes: an encoder configured to perform a low-density parity check (LDPC) encoding on input bits using a parity check matrix to generate an LDPC codeword comprising information word bits and parity bits; an interleaver configured to interleave the LDPC codeword; and a modulator configured to map the interleaved LDPC codeword onto a modulation symbol, wherein the modulator is further configured to map a bit included in a predetermined bit group from among a plurality of bit groups constituting the LDPC codeword onto a predetermined bit of the modulation symbol.