LDPC Bit Interleaver Layout for QPSK Burst Error Distribution
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Bit-Interleaved Coded Modulation (BICM) systems face rapid performance degradation due to burst errors in digital broadcast channels, necessitating an optimized bit interleaver design for modulation order and error correction code parameters.
Innovation Solution
A bit interleaver is designed for an LDPC coder with a length of 64800 and code rate of 7/15, using a specific permutation order for bit group-based interleaving, optimized for QPSK modulation, to effectively distribute burst errors in broadcasting systems like ATSC 3.0.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional bit interleaver is used in BICM systems, then the system structure remains simple, but performance degrades rapidly due to burst errors in digital broadcast channels
Solution Approach 1:
The patent divides the LDPC codeword into multiple bit groups (180 groups of 360 bits each) and applies separate permutation operations to each group. This segmentation allows the interleaver to effectively distribute burst errors across different groups while maintaining a manageable structure that doesn't require complex overall redesign
Solution Approach 2:
The patent optimizes specific parameters including the permutation order sequence, bit group size (360 bits), and number of bit groups (180 groups) to achieve optimal error correction performance for QPSK modulation with LDPC code rate 7/15 and length 64800, transforming the generic interleaver into a specialized optimized design
2Reliability
If the bit interleaver is optimized for specific modulation order and code parameters, then error correction performance improves, but adaptability to different broadcasting standards decreases
Solution Approach 1:
The patent achieves optimal performance for specific parameters (LDPC length 64800, code rate 7/15, QPSK modulation) by carefully tuning the permutation order and bit group configuration, demonstrating how parameter optimization can deliver high reliability for targeted broadcasting standards like ATSC 3.0
3Reliability
If burst errors are not distributed effectively, then the system implementation remains simple, but performance degrades rapidly in digital broadcast channels
Solution Approach 1:
By dividing the codeword into 180 bit groups and applying independent permutation to each group using the formula Yj=Xπ(j), the patent ensures that burst errors affecting consecutive bits are distributed across different bit groups, preventing concentrated error patterns that would degrade performance
Solution Approach 2:
The patent introduces a specifically designed permutation order sequence as an intermediary transformation that maps input bit group positions to output positions, effectively scattering burst errors throughout the transmitted sequence without requiring complex error correction mechanisms
Data Source
AI summary
A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 7/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for quadrature phase shift keying (QPSK) modulation.