LDPC Bit Interleaving for 8PSK Error Protection Balance
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Solution Overview
Problem
In data transmission systems using LDPC codes, such as DVB-S.2, DVB-T.2, and DVB-C.2, ensuring good communication quality is challenging due to errors and erasures, particularly in AWGN channels and multi-path environments, which affect decoding performance and increase power consumption.
Innovation Solution
A data processing device and method that employs a demultiplexer to interchange positions of LDPC code bits, allocating weak error bits to strong symbol bits, and uses parity and column twist interleaving to improve tolerance against burst errors and erasures, thereby enhancing decoding performance and reducing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If LDPC code bits are directly mapped to modulation symbols without interchange, then the mapping process is simple, but error correction performance deteriorates due to unequal error protection across different bit positions
Solution Approach 1:
The patent applies local quality by differentiating the treatment of different LDPC code bit positions. Weak error bits (more susceptible to errors) are identified and specifically mapped to strong symbol bits (more robust modulation positions), while strong error bits are mapped to weak symbol bits. This localized optimization of bit-to-symbol mapping based on individual bit error characteristics improves overall error correction performance without requiring complete redesign of the mapping system.
2Reliability
If conventional mapping is used without considering bit strength, then the system is easier to implement, but communication quality deteriorates in AWGN channels and multi-path environments
Solution Approach 1:
The patent implements preliminary action by pre-calculating and storing the strength characteristics of each LDPC code bit position before the actual data transmission. The bit strength information, derived from the LDPC code structure and modulation scheme, is prepared in advance and used to guide the mapping process. This pre-computation approach allows the system to achieve optimal error protection without adding real-time complexity during actual operation.
3Reliability
If no interleaving is applied, then the transmission process is faster and simpler, but tolerance against burst errors and erasures is reduced
Solution Approach 1:
The patent applies segmentation by dividing the LDPC code bits into different groups based on their error characteristics (weak error bits vs. strong error bits). This segmentation allows the application of different mapping strategies to different bit groups, with weak error bits receiving enhanced protection through specific symbol bit assignments. The segmented approach provides burst error tolerance without requiring complete interleaving of all bits, thus maintaining higher transmission efficiency.
Data Source
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AI summary
A code bit of an LDPC code in which a code length is 16200 bits and an encoding rate is 7/15 is interchanged with a symbol bit of a symbol corresponding to any of 8 signal points defined by 8PSK. In the interchanging, when 3 bits of code bits stored in three units of storages having a storage capacity of 16200/3 bits and read bit by bit from the units of storages are allocated to one symbol, a (#i + 1)-th bit from a most significant bit of the 3 bits of code bits is set to a bit b#i, a (#i + 1)-th bit from a most significant bit of 3 bits of symbol bits of the one symbol is set to a bit y#i, and a bit b0, a bit b1, and a bit b2 are interchanged with a bit y1, a bit y0, and a bit y2.