LDPC Bit Interleaving Layout for Better Broadcast Decoding

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Solution Overview

Problem

There is a need for improved decoding and receiving performance in digital broadcasting services, particularly in high-quality digital television and portable multimedia systems, where existing methods do not adequately support various receiving methods and fail to provide enhanced user experiences.

Innovation Solution

A transmitting apparatus and method that employs LDPC encoding, interleaving, and modulation to map bits from a predetermined bit group onto a modulation symbol, utilizing a parity interleaver, group interleaver, and block interleaver to enhance data transmission and reception performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional transmission methods are used, then device complexity is low, but decoding and receiving performance is insufficient

Engineering Contradiction:
Improvedecoding and receiving performanceVSAvoidtransmission processing complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The LDPC codeword is divided into multiple bit groups, and each bit group is further divided into sub-bit groups. This segmentation allows for granular interleaving operations at different levels (bit group wise interleaving and sub-bit group wise interleaving), enabling improved decoding performance through structured reorganization of code bits while maintaining manageable processing complexity through hierarchical decomposition.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies preliminary interleaving operations to the LDPC codeword before modulation and transmission. The bit group wise interleaver and sub-bit group wise interleaver perform reorganization of code bits in advance, preparing the data structure to withstand channel impairments. This preliminary action ensures that when decoding occurs at the receiver, the structured arrangement of bits facilitates more effective error correction.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If simple interleaving is used, then processing speed is high, but transmission reliability is insufficient

Engineering Contradiction:
Improvedata transmission reliabilityVSAvoidprocessing speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The interleaving process is segmented into multiple stages: bit group wise interleaving followed by sub-bit group wise interleving. This multi-stage segmentation achieves comprehensive bit reorganization for improved transmission reliability while allowing each stage to operate efficiently on smaller data units, maintaining processing speed through divide-and-conquer methodology.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent employs dynamic interleaving strategies where the interleaving patterns and parameters can be adjusted based on channel conditions and service requirements. The use of multiple interleaving levels allows the system to adaptively balance between processing complexity and transmission reliability, optimizing the trade-off between processing speed and reliability for different operating scenarios.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS11349499B2Transmitting apparatus and bit interleaving method thereof
Publication Date: 2022.05.31 SAMSUNG ELECTRONICS CO LTD
  • US11349499B2 patent drawing
  • US11349499B2 patent drawing
  • US11349499B2 patent drawing

AI summary

A transmitting apparatus is provided. The transmitting apparatus includes: an encoder configured to generate a low-density parity check (LDPC) codeword by LDPC encoding of input bits based on a parity check matrix including information word bits and parity bits, the LDPC codeword including a plurality of bit groups each including a plurality of bits; an interleaver configured to interleave the LDPC codeword; and a modulator configured to map the interleaved LDPC codeword onto a modulation symbol, wherein the interleaver is further configured to interleave the LDPC codeword such that a bit included in a predetermined bit group from among the plurality of bit groups constituting the LDPC codeword onto a predetermined bit of the modulation symbol.