LDPC Bit Interleaving for Better Decoding in Digital Broadcasting
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Solution Overview
Problem
There is a need for improved methods to support high decoding and receiving performance in digital broadcasting services, particularly in the era of digitalization, multi-channel, and wideband communication, where existing technologies fall short in providing efficient data transmission and reception.
Innovation Solution
A transmitting apparatus and method that utilizes LDPC encoding, interleaving, and modulation to efficiently map and transmit bits, employing a parity check matrix and interleavers to optimize bit grouping and ordering, thereby enhancing decoding and receiving performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional transmission methods are used, then device complexity is reduced, but decoding and receiving performance deteriorates
Solution Approach 1:
The LDPC codeword is divided into multiple bit groups, and each bit group is independently interleaved and mapped to modulation symbols. This segmentation allows for more granular control over bit placement, improving decoding performance while managing complexity through modular processing.
Solution Approach 2:
The interleaving operation is performed in advance before modulation, systematically rearranging bits according to predetermined patterns based on bit group indices and modulation symbol properties. This preliminary action optimizes the distribution of bits to enhance receiving performance under various channel conditions.
2Reliability
If bits are mapped without optimization, then device complexity is reduced, but bit error rate performance deteriorates
Solution Approach 1:
Different bit groups are mapped to different positions within modulation symbols based on their specific indices and properties. Each bit group receives tailored mapping treatment, placing more robust bits in less reliable symbol positions and vice versa, thereby optimizing overall bit error rate performance.
Solution Approach 2:
The mapping process dynamically adjusts bit positions based on modulation scheme parameters (QPSK, 16-QAM, 64-QAM) and bit group indices. By changing mapping parameters according to specific conditions, the system achieves improved error rate performance across different modulation orders.
3Reliability
If frame error rate is reduced through interleaving, then reliability improves, but processing time increases
Solution Approach 1:
The frame is divided into multiple bit groups that can be interleaved and processed in parallel or semi-parallel fashion. This segmentation reduces the sequential processing burden while maintaining the error dispersal benefits of interleaving, thereby reducing processing time.
Solution Approach 2:
The interleaving operation applies partial reordering based on bit group indices rather than complete frame-level reordering. This partial action achieves sufficient error dispersion to reduce frame error rates while minimizing the processing overhead associated with full interleaving.
Data Source
AI summary
A transmitting apparatus is provided. The transmitting apparatus includes: an encoder configured to generate a low-density parity check (LDPC) codeword by LDPC encoding of input bits based on a parity check matrix including information word bits and parity bits, the LDPC codeword including a plurality of bit groups each including a plurality of bits; an interleaver configured to interleave the LDPC codeword; and a modulator configured to map the interleaved LDPC codeword onto a modulation symbol, wherein the interleaver is further configured to interleave the LDPC codeword such that a bit included in a predetermined bit group from among the plurality of bit groups constituting the LDPC codeword onto a predetermined bit of the modulation symbol.