LDPC Bit Interleaving for High-Order Modulation Reliability
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Solution Overview
Problem
Current communication systems face challenges in overcoming noise, fading, and inter-symbol interference, particularly in high data throughput applications like next-generation mobile communication and digital broadcasting, where existing error-correction codes are inefficient in mapping LDPC codeword bits onto high order modulation bits effectively.
Innovation Solution
A transmitting apparatus and method that includes an encoder for LDPC encoding, an interleaver to rearrange bit groups based on modulation order, and a modulator to generate modulation symbols, utilizing a block interleaver to improve the mapping of LDPC codeword bits onto modulation symbols, specifically for modulation methods like QPSK, 16-QAM, 64-QAM, 256-QAM, 1024-QAM, and 4096-QAM.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If LDPC codeword bits are mapped onto high order modulation bits using conventional methods, then the system can achieve high data throughput, but the reliability deteriorates due to noise and inter-symbol interference
Solution Approach 1:
The LDPC codeword is divided into multiple bit groups, and each bit group is separately interleaved and mapped to modulation symbols. This segmentation allows for more flexible and optimized mapping strategies that can account for the specific characteristics of high-order modulation schemes, thereby improving reliability without sacrificing throughput.
Solution Approach 2:
The patent introduces a group-based interleaving dimension in addition to the traditional bit-level mapping. By organizing bits into groups and applying interleaving at the group level before modulation, the system adds a structural dimension to the mapping process that helps mitigate noise and interference effects in high-order modulation.
2Reliability
If conventional error-correction coding is used, then the system can operate in noisy channels, but the performance deteriorates in high order modulation schemes
Solution Approach 1:
The patent applies different interleaving and mapping strategies to different bit groups within the LDPC codeword. By tailoring the mapping approach for specific portions of the codeword based on their importance and the modulation scheme being used, the system optimizes both error correction performance and modulation efficiency simultaneously.
Data Source
AI summary
A transmitting apparatus and a receiving apparatus are provided. The transmitting apparatus includes an encoder configured to generate a low density parity check (LDPC) codeword by performing LDPC encoding, an interleaver configured to interleave the LDPC codeword, and a modulator configured to modulate the interleaved LDPC codeword according to a modulation method to generate a modulation symbol. The interleaver performs interleaving by dividing the LDPC codeword into a plurality of groups, rearranging an order of the plurality of groups in group units, and dividing the plurality of rearranged groups based on a modulation order according to the modulation method.


