LDPC Bit Interleaving for More Reliable Symbol Mapping
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Solution Overview
Problem
There is a need for improved decoding and receiving performance in digital broadcasting services, particularly in high-quality digital television and portable multimedia systems, where existing methods do not adequately support various receiving methods and require enhanced performance.
Innovation Solution
A transmitting apparatus and method that uses an LDPC codeword encoder, interleaver, and modulator to map bits from a predetermined bit group onto modulation symbols, employing a parity check matrix and interleaving techniques such as parity interleaving, group interleaving, and block interleaving to optimize bit arrangement and decoding efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional transmission methods are used, then device complexity is reduced, but decoding and receiving performance deteriorates
Solution Approach 1:
The LDPC codeword is divided into multiple bit groups, and each bit group is independently interleaved and mapped to modulation symbols. This segmentation allows the system to achieve improved decoding performance through structured bit arrangement while managing complexity by processing bits in organized groups rather than as a monolithic block.
Solution Approach 2:
The interleaver performs preliminary rearrangement of bit groups before modulation and transmission. By pre-organizing the bit sequence according to specific patterns (such as grouping bits from the same column group together), the system prepares the data structure to enhance receiving performance without adding complexity during the actual decoding process.
2Reliability
If bit groups are rearranged to improve decoding performance, then receiving reliability improves, but processing time increases
Solution Approach 1:
By dividing the codeword into bit groups and processing them separately through the interleaver, the system can perform rearrangement operations in parallel or in a streamlined sequential manner. This reduces the overall processing time compared to rearranging all bits individually, while still achieving the reliability benefits of structured bit arrangement.
Solution Approach 2:
The interleaver uses configurable parameters such as the number of bit groups per column group and specific interleaving patterns that can be adjusted based on channel conditions and performance requirements. This allows optimization of the trade-off between receiving reliability and processing time by selecting appropriate parameter values for different operating scenarios.
Data Source
AI summary
A transmitting apparatus is provided. The transmitting apparatus includes: an encoder configured to generate a low-density parity check (LDPC) codeword by LDPC encoding based on a parity check matrix; an interleaver configured to interleave the LDPC codeword; and a modulator configured to map the interleaved LDPC codeword onto a modulation symbol, wherein the modulator is further configured to map a bit included in a predetermined bit group from among a plurality of bit groups constituting the LDPC codeword onto a predetermined bit of the modulation symbol.