LDPC Bit Mapping in Broadcast Transmitters for Robust Decoding

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Solution Overview

Problem

Current digital broadcasting systems face challenges in providing robust encoding and decoding performance for high-quality digital services, particularly in multi-channel and wideband environments.

Innovation Solution

A transmitter apparatus and signal processing method that utilize Low Density Parity Check (LDPC) coding, including an encoder, interleaver, and modulator to map bits from LDPC codewords onto modulation symbols, optimizing bit arrangement based on LDPC codeword length, modulation method, and code rate for improved decoding and receiving performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional encoding and modulation methods are used in digital broadcasting systems, then system simplicity is maintained, but decoding and receiving performance are insufficient for high-quality digital services

Engineering Contradiction:
Improvedecoding and receiving performanceVSAvoidencoding and modulation complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The LDPC codeword is divided into multiple groups (e.g., 360 bits per group), and specific groups are selectively mapped to predetermined bits in modulation symbols. This segmentation approach improves decoding performance by organizing data into manageable units while maintaining system tractability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent employs variable code rates (e.g., 6/15, 8/15, 10/15, 12/15) and different modulation schemes (e.g., 256-QAM) with corresponding mapping patterns. By changing parameters like code rate and modulation order, the system adapts to different channel conditions and service requirements, improving overall receiving performance without requiring a completely different system architecture.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If LDPC coding with group-based mapping is implemented, then error correction capability is improved, but processing complexity increases

Engineering Contradiction:
Improveerror correction capabilityVSAvoidinterleaving and mapping complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The interleaver divides the LDPC codeword into multiple groups of equal size (e.g., 360 bits per group). This segmentation simplifies the overall processing by breaking down the complex interleaving operation into manageable group-level operations, making implementation more tractable while still achieving robust error correction.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs group interleaving before the actual modulation mapping process. By pre-organizing the codeword into groups and determining the mapping pattern in advance based on code rate and modulation scheme, the system prepares the data structure optimally for subsequent processing, reducing real-time computational complexity.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If selective mapping of LDPC codeword groups onto modulation symbols is performed, then data transmission reliability is enhanced, but processing time increases

Engineering Contradiction:
Improvedata transmission reliabilityVSAvoidprocessing time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent defines specific mapping patterns for different code rates and modulation schemes (e.g., Table 37 for 6/15 code rate with 256-QAM, Table 38 for 8/15 code rate). By pre-defining these parameter-specific mapping patterns, the system avoids complex real-time calculations and can quickly apply the appropriate mapping rule based on the selected parameters, reducing processing time while maintaining high reliability.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11601220B2Transmitter apparatus and signal processing method thereof
Publication Date: 2023.03.07 SAMSUNG ELECTRONICS CO LTD
  • US11601220B2 patent drawing
  • US11601220B2 patent drawing
  • US11601220B2 patent drawing

AI summary

A transmitter apparatus and a receiver apparatus are provided. The transmitter apparatus includes: an encoder configured to generate a low density parity check (LDPC) by performing LDPC encoding; an interleaver configured to interleave the LDPC codeword; and a modulator configured to map the interleaved LDPC codeword onto a modulation symbol. The modulator maps a bit included in a predetermined group from among a plurality of groups constituting the LDPC codeword onto a predetermined bit in the modulation symbol.