LDPC Bit Interleaving for Uniform Channel Reliability Mapping
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Solution Overview
Problem
Existing methods for mapping coded bits to channel reliability levels in LDPC codes often result in increased processing latency, decreased decoding reliability, and reduced channel throughput due to distributing coded bits across different channel reliability levels.
Innovation Solution
A method involving the generation of a parity check matrix and interleaving coded bits such that subsets corresponding to the same variable node are mapped to the same channel reliability level, using a block-interleaver to group coded bits for efficient transmission and decoding.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If coded bits are distributed across different channel reliability levels, then channel throughput is increased, but decoding reliability decreases and processing latency increases
Solution Approach 1:
The patent segments coded bits into groups corresponding to the same variable node and assigns each group to a specific channel reliability level. This segmentation allows the system to maintain symmetry in channel reliability for variable nodes while still utilizing multiple reliability levels, thereby improving decoding reliability without sacrificing channel throughput.
Solution Approach 2:
The patent applies local quality by ensuring that coded bits corresponding to the same variable node are mapped to the same channel reliability level, creating local symmetry. This local consistency improves decoding reliability while the overall system can still distribute different variable node groups across different reliability levels to maintain high channel throughput.
2Productivity
If coded bits are distributed across different channel reliability levels, then channel throughput is increased, but processing latency increases
Solution Approach 1:
By segmenting coded bits into groups associated with the same variable node and assigning them to the same channel reliability level, the patent enables more efficient parallel processing during decoding. This reduces processing latency while maintaining the channel throughput benefits of using multiple reliability levels.
Solution Approach 2:
The patent performs preliminary grouping of coded bits by variable node before transmission. This preliminary organization allows the receiving device to process decoded bits more efficiently, reducing processing latency while maintaining high channel throughput through the use of multiple reliability levels.
3Productivity
If coded bits corresponding to the same variable node are mapped to different channel reliability levels, then channel throughput is maximized, but decoding accuracy decreases
Solution Approach 1:
The patent ensures that coded bits corresponding to the same variable node are mapped to the same channel reliability level, creating local symmetry and consistency. This improves decoding accuracy by ensuring that all bits representing the same information are processed with uniform reliability, while the system overall can still utilize multiple reliability levels to maximize channel throughput.
Solution Approach 2:
The patent creates equipotential conditions for coded bits representing the same variable node by mapping them to the same channel reliability level. This ensures equal processing conditions for related bits, improving decoding accuracy while the system maintains high throughput through strategic distribution of different variable node groups across available reliability levels.
Data Source
AI summary
Methods, systems, and devices for wireless communications are described. In some examples, a transmitting device may generate a parity check matrix based on performing a lifting operation on a base matrix. Each column of the base matrix may correspond to a different variable node and each row may correspond to a different check node. The transmitting device may then generate a set of coded bits based on the parity check matrix and each coded bit of the set of coded bits may be associated with a respective variable node. Further, the transmitting device may interleave the set of coded bits such that subsets of the set of coded bits associated with a same variable node are mapped to a same channel reliability level and transmit the set of coded bits according to the interleaving.