LDPC Bit Interleaving for Better Modulation Symbol Mapping

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Solution Overview

Problem

There is a need for improved methods to support high decoding and receiving performance in digital broadcasting services, particularly in a multi-channel, wideband, and high-quality digital environment, where existing technologies fall short in providing efficient data transmission and reception.

Innovation Solution

A transmitting apparatus and method that utilizes LDPC encoding, interleaving, and modulation to efficiently map and transmit bits, employing a parity check matrix and interleavers to optimize bit grouping and ordering, thereby enhancing decoding and receiving performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional encoding and modulation methods are used, then device complexity is reduced, but decoding and receiving performance deteriorates

Engineering Contradiction:
Improvedecoding and receiving performanceVSAvoidencoding and modulation complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The LDPC codeword is divided into multiple bit groups, and each bit group is processed separately through the interleaver. This segmentation allows the system to achieve improved decoding performance through structured interleaving while maintaining manageable complexity by processing groups rather than individual bits throughout the entire codeword.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The interleaver performs preliminary reordering of bits within each bit group before modulation. By pre-arranging bits in an optimized sequence that accounts for expected channel conditions and modulation characteristics, the system improves receiving performance without adding complex real-time processing during transmission.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If bit mapping is optimized for specific modulation symbols, then decoding performance improves, but processing complexity increases

Engineering Contradiction:
Improvebit error rateVSAvoidinterleaving processing complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The interleaving pattern is specifically designed for each bit group position within the modulation symbol, creating locally optimized mappings rather than a uniform approach. This allows the system to achieve lower bit error rates by tailoring the interleaving to local characteristics of different bit positions while keeping the overall structure regular enough to maintain processing efficiency.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS11949433B2Transmitting apparatus and interleaving method thereof
Publication Date: 2024.04.02 SAMSUNG ELECTRONICS CO LTD
  • US11949433B2 patent drawing
  • US11949433B2 patent drawing
  • US11949433B2 patent drawing

AI summary

A transmitting apparatus is provided. The transmitting apparatus includes: an encoder configured to generate a low-density parity check (LDPC) codeword by LDPC encoding of input bits based on a parity check matrix including information word bits and parity bits, the LDPC codeword including a plurality of bit groups each including a plurality of bits; an interleaver configured to interleave the LDPC codeword; and a modulator configured to map the interleaved LDPC codeword onto a modulation symbol, wherein the interleaver is further configured to interleave the LDPC codeword such that a bit included in a predetermined bit group from among the plurality of bit groups constituting the LDPC codeword onto a predetermined bit of the modulation symbol.