LDPC Transmitter Bit-Group Shortening for BER and FER Control
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Solution Overview
Problem
Existing signal transmitters and receivers face challenges in providing improved performance and error rates in digital broadcasting services, particularly in high definition digital television and portable broadcasting signal reception.
Innovation Solution
A transmitter is designed with an outer encoder, zero padder, and LDPC encoder to perform shortening based on a preset shortening pattern. This involves encoding input bits, padding zero bits to form bit groups, and mapping these bits to specific positions to constitute LDPC information bits, which are then LDPC-encoded.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If zero bits are padded to outer-encoded bits to form LDPC information bits, then the code length satisfies the predetermined number of bits required for LDPC encoding, but the bit error rate and frame error rate performance deteriorates without proper positioning
Solution Approach 1:
The patent applies local quality by making different parts of the bit groups have different functions. Specifically, certain bit groups are designated to contain zero bits while others contain outer-encoded bits. This non-uniform distribution optimizes the LDPC encoding performance by ensuring that zero bits are positioned in locations that maintain good bit error rate and frame error rate characteristics, rather than uniformly distributing all bits.
Solution Approach 2:
The patent applies preliminary action by determining the shortening pattern and positioning zero bits in advance before the actual LDPC encoding process. The transmitter pre-calculates which bit groups should contain zero bits based on the code rate and code length requirements, and the receiver uses the same predetermined pattern to correctly interpret the transmitted signal. This advance preparation ensures that the code length precision is achieved without compromising error rate performance.
2Productivity
If outer-encoded bits are mapped to bit groups with zero bits padded, then the LDPC information bits are constituted with proper length, but the complexity of determining and mapping bits increases
Solution Approach 1:
The patent applies segmentation by dividing the LDPC information bits into multiple bit groups, where each group has a specific function. Some bit groups are designated to contain zero bits while others contain outer-encoded bits. This segmentation simplifies the overall mapping process by providing a structured framework that both transmitter and receiver can follow using the predetermined shortening pattern, reducing the complexity compared to arbitrary bit placement.
Solution Approach 2:
The patent applies universality by creating a predetermined shortening pattern that serves multiple purposes: it determines which bit groups contain zero bits, defines the mapping positions for outer-encoded bits, and provides a reusable template for different code rates and lengths. This universal pattern reduces the need for complex, custom mapping logic for each encoding scenario, thereby improving encoding efficiency while managing complexity.
3Reliability
If a predetermined shortening pattern is used to position LDPC information bits, then the bit error rate and frame error rate performance improves, but the adaptability to different code rates and lengths requires preset patterns
Solution Approach 1:
The patent applies parameter changes by creating different predetermined shortening patterns tailored to specific code rates and code lengths. Each pattern is optimized for its particular parameters, allowing the system to achieve optimal bit error rate and frame error rate performance for each configuration. The transmitter and receiver agree on which pattern to use based on the selected parameters, maintaining high reliability while accommodating different operational requirements through parameter-specific optimization.
Data Source
AI summary
A transmitter is provided. The transmitter includes: an outer encoder configured to encode input bits to generate outer-encoded bits including the input bits and parity bits; a zero padder configured to generate a plurality of bit groups each of which is formed of a same number of bits, determine whether a number of the outer-encoded bits satisfies a predetermined number of bits required according to at least one of a code rate and a code length for Low Density Parity Check (LDPC) encoding, pads zero bits to some of the bits in the bit groups if the number of the outer-encoded bits is less than the predetermined number of bits, and maps the outer-encoded bits to remaining bits in the bit groups, based on a predetermined shortening pattern, thereby to constitute LDPC information bits; and an LDPC encoder configured to encode the LDPC information bits, wherein the some of the bits, in which zero bits are padded, are included in some of the bit groups which are not sequentially disposed in the LDPC information bits.