LDPC Block Interleaving for High-Order Modulation Mapping

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Solution Overview

Problem

In communication and broadcasting systems, high digital communication systems face challenges due to noise, fading, and inter-symbol interference, which affect data throughput and reliability, particularly in next-generation mobile communication and digital broadcasting. The performance of Low Density Parity Check (LDPC) codes is hindered by the complexity of mapping codeword bits onto high-order modulation bits.

Innovation Solution

A transmitting apparatus and method that includes an encoder for generating LDPC codewords, an interleaver to divide the codewords into bit groups, and a modulator to map these bits onto modulation symbols using a block interleaver. The interleaver splits columns into first and second parts based on the number of columns and bit groups, optimizing the mapping process for improved performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If LDPC codeword bits are mapped onto high order modulation bits, then data throughput is improved, but mapping complexity increases

Engineering Contradiction:
Improvedata throughputVSAvoidmapping complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The LDPC codeword is divided into multiple bit groups, and the block interleaver is configured with multiple columns corresponding to these bit groups. This segmentation allows the mapping process to be organized in a structured manner, improving throughput while maintaining manageable complexity through systematic division of the mapping task.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a two-dimensional mapping structure using a block interleaver with rows and columns. Codeword bits are written column-wise and read row-wise (or vice versa), transforming the one-dimensional mapping problem into a two-dimensional operation. This dimensional transformation enables efficient high-order modulation mapping while simplifying the overall process through regular patterns.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If noise and interference are overcome to improve reliability, then communication reliability is improved, but system complexity increases

Engineering Contradiction:
Improvecommunication reliabilityVSAvoidsystem complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The block interleaver performs preliminary reordering of LDPC codeword bits before modulation and transmission. This preliminary action distributes bits in a pattern that provides inherent protection against noise and interference, improving reliability before the signal even enters the channel, while avoiding the need for more complex error correction mechanisms.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10243585B2Transmitting apparatus and signal processing method thereof
Publication Date: 2019.03.26 SAMSUNG ELECTRONICS CO LTD
  • US10243585B2 patent drawing
  • US10243585B2 patent drawing
  • US10243585B2 patent drawing

AI summary

A transmitting apparatus and a receiving apparatus are provided. The transmitting apparatus includes an encoder configured to generate a low density parity check (LDPC) codeword by performing LDPC encoding, an interleaver configured to interleave the LDPC codeword, and a modulator configured to modulate the interleaved LDPC codeword according to a modulation method to generate a modulation symbol. The interleaver performs interleaving by dividing the LDPC codeword into a plurality of groups, rearranging an order of the plurality of groups in group units, and dividing the plurality of rearranged groups based on a modulation order according to the modulation method.