LDPC BP Decoding With Row-Wise LLR Updates for Faster Convergence

The patent segments the check matrix H into multiple sub-matrices, allowing the decoding process to be divided into smaller units. This segmentation enables parallel processing of different sub-matrices, reducing the overall computational complexity while maintaining decoding accuracy through systematic processing of divided blocks.

The patent implements dynamic iteration termination by checking whether the syndrome Hx^T equals zero at each iteration step. The decoding process adaptively stops when the termination condition is met, avoiding fixed large numbers of iterations. This dynamic approach reduces average computational complexity while ensuring reliable decoding when conditions are satisfied.

By dividing the check matrix into sub-matrices, the patent reduces the size of individual processing units required for each iteration step. The segmented structure allows for more compact hardware implementation with reduced interconnections and smaller buffer requirements, directly decreasing silicon area while maintaining overall decoding performance.

The dynamic iteration termination mechanism allows the hardware to exit the decoding loop early when the syndrome becomes zero, avoiding unnecessary iterations. This reduces the average active silicon area required during decoding operations, as not all processing units need to remain active for the full maximum number of iterations in every case.

The dynamic iteration termination based on syndrome checking enables the decoder to stop processing as soon as the decoding condition Hx^T = 0 is satisfied. This adaptive approach significantly reduces the average number of iterations required, directly lowering power consumption since each iteration consumes energy. The patent achieves this without sacrificing decoding accuracy, as iterations continue until the correct solution is found.

The segmented matrix structure enables more efficient power utilization by allowing selective activation of processing units corresponding to different sub-matrices. This reduces overall power consumption compared to processing the entire matrix simultaneously, while still achieving accurate decoding through systematic processing of all segments.

The patent implements dynamic iteration control by continuously monitoring the syndrome Hx^T and terminating decoding when it equals zero. This adaptive approach reduces the average number of iterations required compared to fixed iteration schemes, directly improving decoding throughput while maintaining thoroughness. The system dynamically adjusts the number of iterations based on the actual decoding progress rather than using a predetermined large number.

By segmenting the check matrix into sub-matrices, the patent enables parallel processing of multiple sub-matrices simultaneously. This segmentation increases decoding throughput by utilizing parallel computational resources, reducing the effective time required despite the iterative nature of the algorithm. The divided structure allows different processing units to work on different segments concurrently.