LDPC Bit-Group Interleaver for Burst Error Distribution in 64-Symbol BICM
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Solution Overview
Problem
Bit-Interleaved Coded Modulation (BICM) systems suffer from rapid performance degradation due to burst errors in digital broadcast channels, necessitating an optimized bit interleaver design for modulation order and error correction code parameters.
Innovation Solution
A bit interleaver is designed for an LDPC coder with a length of 16200 and code rate of 4/15, using a processor to generate an interleaved codeword on a bit group basis, with a specific permutation order for effective distribution of burst errors, and a modulator performing 64-symbol mapping.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional bit interleaver is used in BICM systems, then the system structure remains simple, but burst errors in the channel cause rapid performance degradation
Solution Approach 1:
The patent divides the codeword into multiple bit groups and applies different interleaving permutations to different segments. Specifically, the codeword is divided into N bit groups, and each group is interleaved using a unique permutation pattern, which distributes burst errors across different code words rather than concentrating them in one location.
Solution Approach 2:
The patent applies different interleaving characteristics to different parts of the codeword. Each bit group has its own specific permutation pattern tailored to its position, creating locally optimized error distribution rather than using a uniform interleaving approach across the entire codeword.
2Reliability
If the bit interleaver is optimized for specific modulation order and code parameters, then performance improves, but the system loses flexibility in selecting different modulation and coding schemes
Solution Approach 1:
The patent makes the interleaver dynamic by allowing the permutation patterns to be selected or configured based on the specific modulation order and code rate being used. The system can adapt the interleaving parameters dynamically according to the transmission conditions and selected coding scheme, rather than being fixed for a single configuration.
Solution Approach 2:
The patent changes the parameters of the interleaver (such as the permutation patterns and bit group divisions) based on the modulation order and code rate. By adjusting these parameters according to the specific BICM configuration, the system maintains optimal performance across different modulation and coding schemes.
3Reliability
If burst errors are not distributed, then the interleaver structure remains simple, but the error correction capability deteriorates rapidly
Solution Approach 1:
The patent introduces a new dimension to the interleaving process by operating on bit groups rather than individual bits. This group-level interleaving adds a structural dimension that more effectively disperses burst errors across the code blocks, enhancing error correction capability without requiring overly complex bit-level permutations.
Data Source
AI summary
A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 16200 and a code rate of 4/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 64-symbol mapping.