LDPC-CC Encoder Rate Control for Low-Complexity Error Correction

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current LDPC-CC encoders and decoders face challenges in supporting multiple coding rates with low computational complexity while maintaining high received data quality, as existing methods either increase computational complexity or compromise on data quality.

Innovation Solution

The implementation of a configuration that includes a coding rate setting section, a computing section, a parity computing section, and an adding section for encoding, and a log likelihood ratio setting section and computation processing section for decoding, using parity check polynomials to generate LDPC-CCs with varying coding rates, allowing for efficient encoding and decoding of arbitrary-length information sequences.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If puncturing processing is used to adjust transmission information sequence length, then the coding rate changes and redundant sequence transmission occurs, but the LDPC code block can correspond to variable-length Ethernet frame

Engineering Contradiction:
Improveadaptability to variable-length framesVSAvoidredundant sequence transmission
Core Design Contradiction:
Adaptability or versatilityVSLoss of information

Solution Approach 1:

The patent changes the fundamental parameter of code structure from block codes to convolutional codes (LDPC-CC). This allows the coding rate to remain constant while the code can adapt to variable-length information sequences through the convolutional encoding process, eliminating the need for puncturing or padding operations that cause redundant transmission.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If multiple codes are provided for different coding rates, then data quality is excellent, but computational complexity increases

Engineering Contradiction:
Improvereceived data qualityVSAvoidcomputational complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent creates a universal LDPC-CC encoder and decoder that can operate at multiple coding rates using a single code structure. The time-varying periodic convolutional code with period m can generate different coding rates by adjusting the encoding parameters without requiring separate codes for each rate, thus maintaining excellent received data quality while reducing computational complexity compared to maintaining multiple separate codes.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Device complexity

If a single LDPC-CC encoder is used for multiple coding rates, then computational complexity is reduced, but maintaining high received data quality becomes difficult

Engineering Contradiction:
Improveencoder complexityVSAvoidreceived data quality
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent employs a time-varying periodic convolutional code where the encoding parameters dynamically change according to the time index modulo m. This dynamic structure allows a single encoder to adapt to different coding rates while maintaining optimal error correction performance for each rate, thus achieving both low computational complexity and high received data quality.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentEP2966783B1Encoder and transmission apparatus
Publication Date: 2018.12.05 PANASONIC HOLDINGS CORP
  • EP2966783B1 patent drawingFigure 1
  • EP2966783B1 patent drawingFigure 2
  • EP2966783B1 patent drawingFigure 3

AI summary

An encoder and decoder using LDPC-CC (Low Density Parity Check-Convolutional Codes) is disclosed. The encoder exhibits encoding rates realized with a small circuit-scale and a high data reception quality. In the encoder (200), an encoding rate setting unit (250) sets an encoding rate (s-1)/s (s=z), and an information creating unit (210) sets information including from information Xs,i to information Xz-1,i to zero. A first information computing unit (220-1) receives information X1,i at time point i to compute the X1(D) term of formula (1). A second information computing unit (220-2) receives information X2,i at time point i to compute the X2(D) term of formula (1). A third information computing unit (220-3) receives information X3,i at time point i to compute the X3(D) term of formula (1). A parity computing unit (230) receives parity Pi-1 at time point i-1 to compute the P(D) of formula (1). The exclusive OR of the results of the computation is obtained as parity Pi at time i. Ax.