LDPC Check Code Structure With Extra Check Rows
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Solution Overview
Problem
Existing low-density parity-check (LDPC) code generators face complexity and resource-intensive challenges due to large matrix operations required for error correction, particularly in converting information bits into check bits, which can be computationally expensive and hardware-intensive.
Innovation Solution
The proposed method involves generating check codes with a greater number of check operations than check bits, utilizing a parity check matrix with additional check rows to provide more constraints for improved error correction, reducing the complexity of matrix operations and resource requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a large generator matrix is used to convert information bits into check bits, then error correction capability is improved, but computational complexity and resource requirements increase
Solution Approach 1:
The patent segments the large generator matrix operations into smaller, more manageable components. By using a parity check matrix with additional check rows, the encoding process divides the computation into smaller matrix-vector multiplications, reducing the computational burden while maintaining error correction capability.
Solution Approach 2:
The patent introduces an additional dimension to the parity check matrix by adding more check rows than traditional LDPC codes. This dimensional expansion allows for more check operations (M) than check bits, creating a richer constraint structure that improves error correction without proportionally increasing complexity.
2Measurement precision
If additional check rows are added to the parity check matrix, then decoding accuracy is improved, but hardware requirements increase
Solution Approach 1:
The patent makes the check bits serve multiple functions by having them participate in multiple check operations. Each check bit is involved in several parity checks, allowing the same hardware resources to be reused across multiple verification operations, thereby improving decoding accuracy without proportionally increasing hardware requirements.
Solution Approach 2:
The patent changes the fundamental parameters of the LDPC code by using more check operations than check bits (M > K), deviating from the traditional M = K relationship. This parameter change enables more constraints per check bit, improving decoding accuracy while the sparse structure maintains reasonable hardware requirements.
3Reliability
If more check operations are performed, then code word error rate is reduced, but processing time increases
Solution Approach 1:
The patent performs preliminary organization of the parity check matrix structure before decoding, arranging check rows and columns to optimize the decoding process. This preliminary structuring enables more efficient processing of the additional check operations, reducing the time penalty while maintaining the error rate benefits.
Solution Approach 2:
The patent designs the check operations to flow continuously through the decoding process, with each check operation building on previous results. This continuous processing approach minimizes idle time and ensures that the additional check operations are performed efficiently, reducing overall processing time while maintaining low error rates.
Data Source
AI summary
Examples of check codes, methods of creating check codes, and communication systems utilizing check codes, such as low-density parity-check codes (LDPC codes) are described herein. In some examples, check codes described herein utilize a larger number of check operations than check bits.