LDPC Check Matrix Generation for Lower Code Rates
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Solution Overview
Problem
Existing techniques for generating parity check matrices for LDPC codes face limitations in improving performance, as they result in decreased row and column weights, and often lead to error floors at high error ratios.
Innovation Solution
A decoding device that stores a first check matrix with the highest code rate, which can be divided into P×P submatrices, and generates a second check matrix with a lower code rate by replacing specified blocks with zero matrices and shifting 1s in other blocks by a fixed value.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the number of rows in the parity check matrix is increased to lower the code rate, then the code rate is reduced, but the row weight decreases and column weight is limited
Solution Approach 1:
The parity check matrix is divided into P×P submatrix blocks. By operating at the block level rather than individual element level, the patent can increase the number of rows (by adding more block rows) while maintaining row weight through strategic placement of submatrices. The segmentation into manageable P×P blocks allows systematic control of matrix properties when expanding the matrix size.
Solution Approach 2:
The patent changes the structural parameters of the parity check matrix by defining specific patterns for P×P submatrices and their arrangements. By controlling the positions and types of submatrices (e.g., identity matrices, zero matrices, permutation matrices), the patent can adjust the code rate while maintaining optimal row and column weights through parameterized matrix construction.
2Adaptability or versatility
If the number of rows in the parity check matrix is increased to lower the code rate, then the code rate is reduced, but error floor occurs at high error ratio
Solution Approach 1:
By segmenting the parity check matrix into P×P submatrix blocks with specific structural patterns, the patent maintains good distance properties and avoids error floors even when increasing the number of rows. The block structure ensures that the matrix maintains its decoding performance characteristics across different code rates.
Solution Approach 2:
The patent uses parameterized construction of the parity check matrix where the arrangement and types of P×P submatrices are controlled to maintain optimal properties. This parameterized approach ensures that reliability metrics such as error floor performance are preserved when the matrix size is increased to achieve lower code rates.
3Adaptability or versatility
If a new parity check matrix is generated by dividing rows of the original matrix, then the code rate is adjusted, but the newly generated matrix has decreased row weight
Solution Approach 1:
Instead of dividing individual rows into smaller segments, the patent segments the matrix into P×P submatrix blocks and operates at this block level. This approach allows generating new parity check matrices with adjusted code rates while preserving row weight by maintaining the block structure and strategically placing submatrices rather than fragmenting row elements.
Solution Approach 2:
The patent employs parameterized matrix generation where the code rate is adjusted by changing the arrangement parameters of P×P submatrices rather than by row division. This parameter change approach allows flexible code rate adjustment while maintaining optimal row weight through controlled submatrix placement patterns.
4Adaptability or versatility
If the number of rows is increased in the parity check matrix, then the code rate is lowered, but computational processing increases
Solution Approach 1:
By segmenting the parity check matrix into P×P submatrix blocks, the patent enables efficient computational processing even with increased row counts. The block structure allows for optimized decoding algorithms that can exploit the regular patterns in submatrix arrangements, reducing the computational complexity compared to handling fully dense or irregular large matrices.
Solution Approach 2:
The parameterized construction of the parity check matrix with specific P×P submatrix patterns enables efficient decoding by creating regular structures that can be processed more quickly. The controlled arrangement of submatrices allows decoding algorithms to exploit these patterns, improving productivity despite the increased matrix size required for lower code rates.
Data Source
AI summary
A decoding device includes a storage unit storing a first check matrix with a highest code rate that can be divided into blocks of P×P submatrices, the highest code rate being conceivable as a check matrix of a low-density parity-check code used in communication, where P is a positive integer; and a generation unit that generates, using a unit row of the first check matrix that includes submatrices in column directions, a first row where some blocks are replaced with zero matrices and at least one second row where specified blocks are replaced with zero matrices, with the other blocks of submatrices having 1s shifted by a specified fixed value, to generate a second check matrix with a lower code rate than the first check matrix.