LDPC Check Matrix Structure for Reliable Long-Code Transmission

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Solution Overview

Problem

Current data transmission using LDPC codes faces challenges in maintaining favorable communication quality, particularly in ensuring reliable error correction and minimizing error floor phenomena in digital broadcasting systems.

Innovation Solution

The implementation of an LDPC coding method with a specific check matrix of 69120 bits and a code rate of 9/16, utilizing an information matrix section and parity matrix section represented by an initial value table indicating positions of elements, enhances communication quality by improving error correction capabilities and reducing block error rates.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If LDPC coding is performed with conventional check matrices, then data transmission can be achieved, but communication quality and error correction capability are insufficient

Engineering Contradiction:
Improvecommunication qualityVSAvoidcheck matrix structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The check matrix is divided into an information matrix section and a parity matrix section, with the information matrix section further structured using an initial value table that defines positions of elements on a basis of 360 columns. This segmentation allows for optimized error correction performance while maintaining manageable complexity through modular structure.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent specifies precise parameters for the LDPC code including code length N=69120 bits, code rate r=9/16, and a carefully constructed initial value table with specific numerical entries. These parameter changes optimize the code's error correction capability and communication quality while avoiding the error floor phenomenon.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If code length is increased to improve error correction performance, then performance approaches Shannon limit, but system complexity and processing requirements increase

Engineering Contradiction:
Improveerror correction capabilityVSAvoidcoding system complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The large-scale check matrix with 69120 bits is segmented into manageable sections (information matrix and parity matrix), with the information matrix organized using an initial value table. This segmentation enables implementation of long-code LDPC with Shannon-limit performance while keeping the system structure organized and implementable.

Inventive Principle:
Principle #1Segmentation

3Reliability

If conventional LDPC coding is used, then data transmission is achieved, but error floor phenomenon occurs and blocks error rate is not sufficiently reduced

Engineering Contradiction:
Improveblock error rateVSAvoiderror floor phenomenon
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent employs specific parameter settings including code length N=69120, code rate r=9/16, and a precisely defined initial value table with specific numerical entries. These parameter changes are designed to eliminate the error floor phenomenon and achieve excellent block error rate characteristics without the harmful effects seen in conventional LDPC implementations.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS10873344B2Transmission apparatus, transmission method, reception apparatus, and reception method
Publication Date: 2020.12.22 SONY GROUP CORP
  • US10873344B2 patent drawing
  • US10873344B2 patent drawing
  • US10873344B2 patent drawing

AI summary

The present technique relates to a transmission apparatus, a transmission method, a reception apparatus, and a reception method that can ensure favorable communication quality in data transmission using an LDPC code. LDPC coding is performed based on a check matrix of an LDPC code with a code length N of 69120 bits and a code rate r of 9/16 or 10/16. The LDPC code includes information bits and parity bits, and the check matrix includes an information matrix corresponding to the information bits and a parity matrix corresponding to the parity bits. The information matrix is represented by a check matrix initial value table. The check matrix initial value table is a table indicating positions of elements of 1 in the information matrix on the basis of 360 columns and is a predetermined table. The present technique can be applied to, for example, data transmission using the LDPC code.