Non-Binary LDPC Decoding with Exponent-Based Check Nodes

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Solution Overview

Problem

Conventional non-binary LDPC code decoders require significant memory capacity for check node operations due to the need for storing permutation and inverse permutation information, which is a limitation in next-generation communication systems.

Innovation Solution

Expressing elements of the Galois field using an exponent representation instead of polynomial representation to reduce memory requirements, allowing for a check node operation with minimized memory capacity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If polynomial representation is used for Galois field elements, then the check node operation can be performed, but significant memory capacity is required for storing permutation and inverse permutation information

Engineering Contradiction:
Improvedecoding capabilityVSAvoidmemory capacity
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent changes the representation parameter of Galois field elements from polynomial form to exponent form. This parameter change transforms the multiplication operation into addition of exponents, eliminating the need for large permutation tables and significantly reducing memory capacity requirements while maintaining decoding capability

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent substitutes the complex permutation table storage mechanism with a simpler exponent-based arithmetic mechanism. Instead of storing and retrieving large permutation tables in memory, the system uses exponent addition to perform multiplication operations, replacing a memory-intensive approach with a computation-efficient approach

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS7941736B2Apparatus and method for receiving signal in communication system
Publication Date: 2011.05.10 SAMSUNG ELECTRONICS CO LTD
  • US7941736B2 patent drawing
  • US7941736B2 patent drawing
  • US7941736B2 patent drawing

AI summary

Disclosed is an apparatus for receiving a signal in a communication system, which receives the signal, and decodes the received signal in a non-binary Low Density Parity Check (LDPC) decoding scheme, in which elements of a Galois field are expressed by an exponent representation, thereby minimizing the memory capacity required for a check node operation when the non-binary LDPC code is decoded.