Non-Binary LDPC Check Node Processing With Reduced Syndrome Computation
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Solution Overview
Problem
Existing architectures for check node processing in iterative decoders, such as those used in non-binary LDPC codes, face high computational complexity and resource requirements, particularly due to the number of computed syndromes, which hinders efficient decoding in practical implementations.
Innovation Solution
The proposed solution involves a method for reducing the number of computed syndromes by using elementary check node processors in a syndrome calculator, allowing for parallelism and reduced complexity, combining the benefits of syndrome-based decoding with low-complexity elementary check node processing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If syndrome-based decoding is used for non-binary LDPC codes, then decoding performance is improved, but computational complexity and resource requirements increase significantly
Solution Approach 1:
The check node processing is segmented into multiple elementary check node processors, each handling a specific subset of syndromes. This segmentation divides the complex syndrome computation task into smaller, manageable units that can be processed in parallel, reducing the overall computational burden while maintaining decoding performance.
Solution Approach 2:
Instead of computing all possible syndromes, the invention computes only a selected subset of syndromes that are sufficient for achieving the desired decoding performance. This partial action approach reduces computational complexity and resource requirements while still providing effective error correction.
2Reliability
If syndrome-based decoding is used for non-binary LDPC codes, then decoding performance is improved, but hardware costs and silicon area increase
Solution Approach 1:
The check node processing unit is divided into multiple elementary check node processors that can be implemented in parallel. This segmentation allows for a more efficient hardware architecture where each processor handles a specific subset of syndromes, reducing the overall silicon area required compared to a monolithic implementation.
Solution Approach 2:
The invention computes only a selected subset of syndromes rather than all possible syndromes. This partial computation approach significantly reduces the hardware resources and silicon area required for the decoder while maintaining sufficient decoding performance for practical applications.
3Measurement precision
If the number of computed syndromes is increased, then decoding accuracy is improved, but throughput and processing efficiency decrease
Solution Approach 1:
The invention identifies and computes only the essential subset of syndromes needed for achieving the desired decoding accuracy. By avoiding computation of redundant syndromes, the system maintains high decoding accuracy while significantly improving throughput and processing efficiency.
Solution Approach 2:
The syndrome computation is segmented into multiple independent elementary processors that can operate in parallel. This segmentation enables the system to process multiple syndromes simultaneously, improving throughput while maintaining the accuracy required for reliable decoding.
Data Source
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AI summary
Embodiments of the invention provide a check node processing unit implemented in a decoder for decoding a signal, the check node processing unit being configured to receive at least three input messages and to generate at least one output message, wherein the check node processing unit comprises: - a syndrome calculator (31) configured to determine a set of syndromes from said at least three input messages using at least two elementary check node processors (311), each syndrome comprising a symbol, a reliability metric associated with said symbol, and a binary vector; - a decorrelation unit (33) configured to determine, in association with at least an output message, a set of candidate components from said set of syndromes, each candidate component comprising a symbol and a reliability metric associated with said symbol, said set of candidate components comprising one or more pairs of components comprising a same symbol; and - a selection unit (35) configured to determine at least an output message by selecting components comprising distinct symbols from the set of candidate components associated with said at least an output message.