LDPC Decoder Checksum Pre-Processing for Flash Read Throughput

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Solution Overview

Problem

As flash memory devices age, they experience increased errors in read data, leading to reduced decoder throughput, which existing memory systems struggle to maintain effectively.

Innovation Solution

Incorporating a pre-processing checksum unit and a low-density parity-check (LDPC) decoder with a checksum update unit to compute and store checksum values during the first decoding iteration, allowing for improved decoding in subsequent iterations based on the checksum_pre value.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Duration of action of stationary object

If flash memory devices are used for extended time, then endurance and retention increase, but the number of errors in read data increases leading to reduced decoder throughput

Engineering Contradiction:
Improveendurance and retentionVSAvoiddecoder throughput
Core Design Contradiction:
Duration of action of stationary objectVSProductivity

Solution Approach 1:

The patent applies preliminary action by computing a checksum of the hard read data before the main LDPC decoding process begins. This pre-computed checksum (checksum_pre) is stored and used during subsequent decoding iterations to quickly identify and handle erroneous codewords, thereby maintaining decoder throughput even as memory devices age and error rates increase.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If error handling is improved for aged memory devices, then decoder throughput is maintained, but system complexity increases due to additional checksum units and processing

Engineering Contradiction:
Improvedecoder throughputVSAvoiddecoder structure
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent applies segmentation by dividing the decoding process into distinct stages: a pre-processing stage that computes checksums on hard read data, and subsequent LDPC decoding iterations that utilize these pre-computed checksums. This segmentation allows error handling to be performed efficiently in parallel with the main decoding process, maintaining throughput without proportionally increasing complexity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces checksum computation as an intermediary step between hard read and soft read operations. This intermediary process generates checksum values that mediate the error detection and handling process, enabling the system to efficiently identify and correct errors in aged memory devices without requiring complete re-decoding of all data.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS10122382B2VSS LDPC decoder with improved throughput for hard decoding
Publication Date: 2018.11.06 SK HYNIX INC
  • US10122382B2 patent drawing
  • US10122382B2 patent drawing
  • US10122382B2 patent drawing

AI summary

Memory systems may include a memory storage, a pre-processing checksum unit suitable for, during a first decoding iteration, receiving hard read data including channel input (Lch) sign values, and computing a checksum of the Lch sign values as a checksum_pre value, and a low-density parity-check (LDPC) decoder including an Lch memory and a checksum update unit, the LDPC decoder suitable for, during the first decoding iteration, storing the Lch sign values in the Lch memory of the LDPC decoder, receiving, with the checksum update unit, the checksum_pre value, and decoding a codeword in at least a second decoding iteration based at least in part on the checksum_pre value computed and received being a parity check on the hard read performed in the first decoding iteration.