Configurable LDPC Circular Buffer for Flexible Rate Matching

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Solution Overview

Problem

Current low-density parity check (LDPC) codes in wireless communication systems face challenges in achieving high throughput with efficient hardware utilization, particularly in supporting a wide range of information block lengths and code rates, which is crucial for next-generation networks like 5G New Radio.

Innovation Solution

The implementation of a configurable circular buffer for rate-matched transmissions, where the circular buffer length and sizes of systematic and parity bit sections can be varied based on the selected mother code rate, allowing for flexible coding gains and supporting lower code rates, while maintaining efficient hardware utilization.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If a fixed circular buffer length is used for LDPC coding, then hardware utilization is simplified, but the system cannot support a wide range of information block lengths and code rates

Engineering Contradiction:
Improvesupport for wide range of information block lengths and code ratesVSAvoidhardware utilization complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent implements a configurable circular buffer where the buffer length and the sizes of systematic bit and parity bit sections can be dynamically adjusted based on the selected mother code rate. This dynamic configuration enables the system to adapt to different information block lengths and code rates while maintaining efficient hardware utilization through a unified buffer structure.

Inventive Principle:
Principle #15Dynamics

2Reliability

If the circular buffer is configured for maximum information block size, then the minimum mother code rate is achieved, but coding gains diminish at lower code rates

Engineering Contradiction:
Improvecoding gainsVSAvoidsupport for lower code rates
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent changes the parameters of the circular buffer configuration based on the mother code rate. By adjusting the buffer length and the distribution between systematic and parity bit sections according to the selected code rate, the system maintains optimal coding gains across a wide range of code rates, including lower code rates where traditional fixed configurations would fail.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If variable circular buffer length is used to support lower code rates, then coding performance is improved, but hardware complexity increases

Engineering Contradiction:
Improvecoding performanceVSAvoidhardware utilization
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent creates a universal circular buffer configuration that can serve multiple code rates and information block lengths. By defining the buffer with configurable parameters that adapt to different mother code rates, a single hardware structure achieves multi-functionality, supporting both high and low code rates without requiring separate dedicated hardware for each scenario.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS10348329B2Low density parity check (LDPC) circular buffer rate matching
Publication Date: 2019.07.09 QUALCOMM INC
  • US10348329B2 patent drawing
  • US10348329B2 patent drawing
  • US10348329B2 patent drawing

AI summary

Aspects of the present disclosure relate to low density parity check (LDPC) coding utilizing a configurable circular buffer for rate matched transmissions. The circular buffer may be configured based on a selected mother code rate and a fixed circular buffer length. For example, the respective sizes of the systematic and parity bit sections of the circular buffer may be variable based on the selected mother code rate.