LDPC Codeword Interleaving Layout for Broadcast Decoding Reliability

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Solution Overview

Problem

There is a need for improved decoding and receiving performance in digital broadcasting services, particularly in high-quality digital televisions and portable multimedia players, due to the increasing demand for efficient methods to support various receiving methods of digital broadcasting services.

Innovation Solution

A transmitting apparatus and method that performs LDPC encoding, interleaving, and modulation to map bits from a predetermined bit group of a low-density parity-check (LDPC) codeword onto a modulation symbol, using a parity check matrix and an interleaver to enhance decoding and receiving performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional LDPC encoding and modulation is used, then the system is simple to implement, but decoding and receiving performance is insufficient

Engineering Contradiction:
Improvedecoding and receiving performanceVSAvoidinterleaving structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The interleaver is divided into three independent sub-interleavers: a parity interleaver for interleaving parity bits, a group interleaver for dividing and rearranging bit groups, and a block interleaver for final bit-level interleaving. This segmentation allows each component to perform a specific function, improving overall decoding performance while maintaining manageable complexity through modular design.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The parity interleaver performs preliminary interleaving of parity bits before the codeword is divided into bit groups. This preliminary action ensures that parity bits are properly distributed across different bit groups, which improves error correction performance during decoding by preventing concentrated errors in specific positions.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If bit groups are rearranged using complex permutation, then receiving performance improves, but processing complexity increases

Engineering Contradiction:
Improvereceiving performanceVSAvoidprocessing efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The group interleaver applies different permutation patterns to different bit groups based on their positions and characteristics. Specifically, bit groups are rearranged using position-dependent indexing where the permutation pattern varies according to the group index, allowing optimal error distribution for each local region of the codeword while maintaining overall processing efficiency.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The system changes the permutation parameters of the group interleaver based on the code rate and block length. Different code rates (e.g., 1/3, 2/3, 3/4) use different permutation patterns, allowing the system to optimize receiving performance for each specific operating condition without requiring a completely different interleaving structure.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If all bit groups are interleaved together, then error distribution improves, but loss of information increases due to mixing information and parity bits

Engineering Contradiction:
Improveerror distributionVSAvoidinformation bit separation
Core Design Contradiction:
ReliabilityVSLoss of information

Solution Approach 1:

The parity interleaver extracts and separately interleaves parity bits from the LDPC codeword before the group interleaver processes the remaining structure. This extraction ensures that parity bits are properly distributed without completely mixing them with information bits, maintaining the ability to identify and correct errors while preserving information bit integrity for subsequent processing stages.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS10432221B2Transmitting apparatus and interleaving method thereof
Publication Date: 2019.10.01 SAMSUNG ELECTRONICS CO LTD
  • US10432221B2 patent drawing
  • US10432221B2 patent drawing
  • US10432221B2 patent drawing

AI summary

A transmitting apparatus is provided. The transmitting apparatus includes: an encoder configured to perform a low-density parity check (LDPC) encoding on input bits using a parity check matrix to generate an LDPC codeword comprising information word bits and parity bits; an interleaver configured to interleave the LDPC codeword; and a modulator configured to map the interleaved LDPC codeword onto a modulation symbol, wherein the modulator is further configured to map a bit included in a predetermined bit group from among a plurality of bit groups constituting the LDPC codeword onto a predetermined bit of the modulation symbol.