LDPC Parity-Check Matrix Structure for Noise-Robust Codewords
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Solution Overview
Problem
Current LDPC code technologies face challenges in designing parity-check matrices that optimize performance for high-speed digital communication systems, particularly in overcoming noise, fading, and inter-symbol interference, which affects data throughput and reliability.
Innovation Solution
The development of an LDPC encoding and decoding apparatus and method using a parity-check matrix with a specific structure, including an information word sub-matrix and a parity sub-matrix, defined by tables representing positions of value one, to improve LDPC encoding and decoding performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional LDPC encoding and decoding methods are used, then implementation is simpler, but error correction performance deteriorates in high-speed digital communication systems with noise and interference
Solution Approach 1:
The parity-check matrix is divided into multiple sub-matrices, where each sub-matrix corresponds to a specific column block. This segmentation allows independent optimization of each sub-matrix while maintaining overall system performance, resolving the contradiction between complex global optimization and simple implementation.
Solution Approach 2:
Different sub-matrices within the parity-check matrix are designed with different structures and properties tailored to specific requirements. Each sub-matrix can be optimized locally for its specific function, achieving high error correction performance without requiring complex global redesign of the entire matrix.
2Reliability
If the parity-check matrix is designed with optimized structure for better error correction, then reliability improves, but the design and implementation complexity increases
Solution Approach 1:
The optimized parity-check matrix is segmented into multiple sub-matrices that can be independently designed and implemented. This allows the system to achieve high reliability through optimized local structures without requiring the entire matrix to be complex, thus resolving the contradiction between reliability and complexity.
Solution Approach 2:
The patent employs dynamic row permutation and column selection based on channel conditions and performance requirements. This dynamic approach allows the system to adapt the matrix structure to achieve optimal reliability while keeping the base structure relatively simple, resolving the contradiction between optimized performance and implementation complexity.
3Reliability
If iterative decoding with sum-product algorithm is applied to approach Shannon's channel capacity, then error correction performance improves, but computational complexity increases
Solution Approach 1:
The decoding process is segmented into multiple iterative steps with simplified operations at each step. By dividing the complex sum-product algorithm into manageable segments that operate on individual sub-matrices, the system achieves near-Shannon capacity performance while reducing the computational burden of each individual decoding operation.
Solution Approach 2:
The patent implements a truncated or reduced version of the full sum-product algorithm that performs partial iterations or uses simplified message passing rules. This partial action approach achieves sufficient error correction performance close to Shannon's capacity while significantly reducing the computational complexity compared to the complete algorithm.
Data Source
AI summary
An encoding apparatus is provided. The encoding includes a low density parity check (LDPC) encoder which performs LDPC encoding on input bits based on a parity-check matrix to generate an LDPC codeword formed of 64,800 bits, in which the parity-check matrix includes an information word sub-matrix and a parity sub-matrix, the information word sub-matrix is formed of a group of a plurality of column blocks each including 360 columns, and the parity-check matrix and the information word sub-matrix are defined by various tables which represent positions of value one (1) present in every 360-th column.